sdkconfig.cmake 68 KB

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  1. #
  2. # Automatically generated file. DO NOT EDIT.
  3. # Espressif IoT Development Framework (ESP-IDF) Configuration cmake include file
  4. #
  5. set(CONFIG_SOC_ADC_SUPPORTED "y")
  6. set(CONFIG_SOC_UART_SUPPORTED "y")
  7. set(CONFIG_SOC_PCNT_SUPPORTED "y")
  8. set(CONFIG_SOC_PHY_SUPPORTED "y")
  9. set(CONFIG_SOC_WIFI_SUPPORTED "y")
  10. set(CONFIG_SOC_TWAI_SUPPORTED "y")
  11. set(CONFIG_SOC_GDMA_SUPPORTED "y")
  12. set(CONFIG_SOC_UHCI_SUPPORTED "y")
  13. set(CONFIG_SOC_AHB_GDMA_SUPPORTED "y")
  14. set(CONFIG_SOC_GPTIMER_SUPPORTED "y")
  15. set(CONFIG_SOC_LCDCAM_SUPPORTED "y")
  16. set(CONFIG_SOC_LCDCAM_CAM_SUPPORTED "y")
  17. set(CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED "y")
  18. set(CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED "y")
  19. set(CONFIG_SOC_MCPWM_SUPPORTED "y")
  20. set(CONFIG_SOC_DEDICATED_GPIO_SUPPORTED "y")
  21. set(CONFIG_SOC_CACHE_SUPPORT_WRAP "y")
  22. set(CONFIG_SOC_ULP_SUPPORTED "y")
  23. set(CONFIG_SOC_ULP_FSM_SUPPORTED "y")
  24. set(CONFIG_SOC_RISCV_COPROC_SUPPORTED "y")
  25. set(CONFIG_SOC_BT_SUPPORTED "y")
  26. set(CONFIG_SOC_USB_OTG_SUPPORTED "y")
  27. set(CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED "y")
  28. set(CONFIG_SOC_CCOMP_TIMER_SUPPORTED "y")
  29. set(CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED "y")
  30. set(CONFIG_SOC_SUPPORTS_SECURE_DL_MODE "y")
  31. set(CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD "y")
  32. set(CONFIG_SOC_EFUSE_SUPPORTED "y")
  33. set(CONFIG_SOC_SDMMC_HOST_SUPPORTED "y")
  34. set(CONFIG_SOC_RTC_FAST_MEM_SUPPORTED "y")
  35. set(CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED "y")
  36. set(CONFIG_SOC_RTC_MEM_SUPPORTED "y")
  37. set(CONFIG_SOC_PSRAM_DMA_CAPABLE "y")
  38. set(CONFIG_SOC_XT_WDT_SUPPORTED "y")
  39. set(CONFIG_SOC_I2S_SUPPORTED "y")
  40. set(CONFIG_SOC_RMT_SUPPORTED "y")
  41. set(CONFIG_SOC_SDM_SUPPORTED "y")
  42. set(CONFIG_SOC_GPSPI_SUPPORTED "y")
  43. set(CONFIG_SOC_LEDC_SUPPORTED "y")
  44. set(CONFIG_SOC_I2C_SUPPORTED "y")
  45. set(CONFIG_SOC_SYSTIMER_SUPPORTED "y")
  46. set(CONFIG_SOC_SUPPORT_COEXISTENCE "y")
  47. set(CONFIG_SOC_TEMP_SENSOR_SUPPORTED "y")
  48. set(CONFIG_SOC_AES_SUPPORTED "y")
  49. set(CONFIG_SOC_MPI_SUPPORTED "y")
  50. set(CONFIG_SOC_SHA_SUPPORTED "y")
  51. set(CONFIG_SOC_HMAC_SUPPORTED "y")
  52. set(CONFIG_SOC_DIG_SIGN_SUPPORTED "y")
  53. set(CONFIG_SOC_FLASH_ENC_SUPPORTED "y")
  54. set(CONFIG_SOC_SECURE_BOOT_SUPPORTED "y")
  55. set(CONFIG_SOC_MEMPROT_SUPPORTED "y")
  56. set(CONFIG_SOC_TOUCH_SENSOR_SUPPORTED "y")
  57. set(CONFIG_SOC_BOD_SUPPORTED "y")
  58. set(CONFIG_SOC_CLK_TREE_SUPPORTED "y")
  59. set(CONFIG_SOC_MPU_SUPPORTED "y")
  60. set(CONFIG_SOC_WDT_SUPPORTED "y")
  61. set(CONFIG_SOC_SPI_FLASH_SUPPORTED "y")
  62. set(CONFIG_SOC_RNG_SUPPORTED "y")
  63. set(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED "y")
  64. set(CONFIG_SOC_DEEP_SLEEP_SUPPORTED "y")
  65. set(CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT "y")
  66. set(CONFIG_SOC_PM_SUPPORTED "y")
  67. set(CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED "y")
  68. set(CONFIG_SOC_XTAL_SUPPORT_40M "y")
  69. set(CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG "y")
  70. set(CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED "y")
  71. set(CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED "y")
  72. set(CONFIG_SOC_ADC_ARBITER_SUPPORTED "y")
  73. set(CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED "y")
  74. set(CONFIG_SOC_ADC_MONITOR_SUPPORTED "y")
  75. set(CONFIG_SOC_ADC_DMA_SUPPORTED "y")
  76. set(CONFIG_SOC_ADC_PERIPH_NUM "2")
  77. set(CONFIG_SOC_ADC_MAX_CHANNEL_NUM "10")
  78. set(CONFIG_SOC_ADC_ATTEN_NUM "4")
  79. set(CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM "2")
  80. set(CONFIG_SOC_ADC_PATT_LEN_MAX "24")
  81. set(CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH "12")
  82. set(CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH "12")
  83. set(CONFIG_SOC_ADC_DIGI_RESULT_BYTES "4")
  84. set(CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV "4")
  85. set(CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM "2")
  86. set(CONFIG_SOC_ADC_DIGI_MONITOR_NUM "2")
  87. set(CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH "83333")
  88. set(CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW "611")
  89. set(CONFIG_SOC_ADC_RTC_MIN_BITWIDTH "12")
  90. set(CONFIG_SOC_ADC_RTC_MAX_BITWIDTH "12")
  91. set(CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED "y")
  92. set(CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED "y")
  93. set(CONFIG_SOC_ADC_SHARED_POWER "y")
  94. set(CONFIG_SOC_APB_BACKUP_DMA "y")
  95. set(CONFIG_SOC_BROWNOUT_RESET_SUPPORTED "y")
  96. set(CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED "y")
  97. set(CONFIG_SOC_CACHE_FREEZE_SUPPORTED "y")
  98. set(CONFIG_SOC_CACHE_ACS_INVALID_STATE_ON_PANIC "y")
  99. set(CONFIG_SOC_CPU_CORES_NUM "2")
  100. set(CONFIG_SOC_CPU_INTR_NUM "32")
  101. set(CONFIG_SOC_CPU_HAS_FPU "y")
  102. set(CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES "y")
  103. set(CONFIG_SOC_CPU_BREAKPOINTS_NUM "2")
  104. set(CONFIG_SOC_CPU_WATCHPOINTS_NUM "2")
  105. set(CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE "0x40")
  106. set(CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT "16")
  107. set(CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN "4096")
  108. set(CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH "16")
  109. set(CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US "1100")
  110. set(CONFIG_SOC_AHB_GDMA_VERSION "1")
  111. set(CONFIG_SOC_GDMA_NUM_GROUPS_MAX "1")
  112. set(CONFIG_SOC_GDMA_PAIRS_PER_GROUP "5")
  113. set(CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX "5")
  114. set(CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM "y")
  115. set(CONFIG_SOC_GPIO_PORT "1")
  116. set(CONFIG_SOC_GPIO_PIN_COUNT "49")
  117. set(CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER "y")
  118. set(CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB "y")
  119. set(CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT "y")
  120. set(CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD "y")
  121. set(CONFIG_SOC_GPIO_VALID_GPIO_MASK "0x1ffffffffffff")
  122. set(CONFIG_SOC_GPIO_IN_RANGE_MAX "48")
  123. set(CONFIG_SOC_GPIO_OUT_RANGE_MAX "48")
  124. set(CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK "0x1fffffc000000")
  125. set(CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX "y")
  126. set(CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM "3")
  127. set(CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP "y")
  128. set(CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM "8")
  129. set(CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM "8")
  130. set(CONFIG_SOC_DEDIC_GPIO_OUT_AUTO_ENABLE "y")
  131. set(CONFIG_SOC_I2C_NUM "2")
  132. set(CONFIG_SOC_HP_I2C_NUM "2")
  133. set(CONFIG_SOC_I2C_FIFO_LEN "32")
  134. set(CONFIG_SOC_I2C_CMD_REG_NUM "8")
  135. set(CONFIG_SOC_I2C_SUPPORT_SLAVE "y")
  136. set(CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS "y")
  137. set(CONFIG_SOC_I2C_SUPPORT_XTAL "y")
  138. set(CONFIG_SOC_I2C_SUPPORT_RTC "y")
  139. set(CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR "y")
  140. set(CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST "y")
  141. set(CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS "y")
  142. set(CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE "y")
  143. set(CONFIG_SOC_I2S_NUM "2")
  144. set(CONFIG_SOC_I2S_HW_VERSION_2 "y")
  145. set(CONFIG_SOC_I2S_SUPPORTS_XTAL "y")
  146. set(CONFIG_SOC_I2S_SUPPORTS_PLL_F160M "y")
  147. set(CONFIG_SOC_I2S_SUPPORTS_PCM "y")
  148. set(CONFIG_SOC_I2S_SUPPORTS_PDM "y")
  149. set(CONFIG_SOC_I2S_SUPPORTS_PDM_TX "y")
  150. set(CONFIG_SOC_I2S_SUPPORTS_PCM2PDM "y")
  151. set(CONFIG_SOC_I2S_SUPPORTS_PDM_RX "y")
  152. set(CONFIG_SOC_I2S_SUPPORTS_PDM2PCM "y")
  153. set(CONFIG_SOC_I2S_PDM_MAX_TX_LINES "2")
  154. set(CONFIG_SOC_I2S_PDM_MAX_RX_LINES "4")
  155. set(CONFIG_SOC_I2S_SUPPORTS_TDM "y")
  156. set(CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK "y")
  157. set(CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK "y")
  158. set(CONFIG_SOC_LEDC_TIMER_NUM "4")
  159. set(CONFIG_SOC_LEDC_CHANNEL_NUM "8")
  160. set(CONFIG_SOC_LEDC_TIMER_BIT_WIDTH "14")
  161. set(CONFIG_SOC_LEDC_SUPPORT_FADE_STOP "y")
  162. set(CONFIG_SOC_MCPWM_GROUPS "2")
  163. set(CONFIG_SOC_MCPWM_TIMERS_PER_GROUP "3")
  164. set(CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP "3")
  165. set(CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR "2")
  166. set(CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR "2")
  167. set(CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR "2")
  168. set(CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP "3")
  169. set(CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP "y")
  170. set(CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER "3")
  171. set(CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP "3")
  172. set(CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE "y")
  173. set(CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM "1")
  174. set(CONFIG_SOC_MMU_PERIPH_NUM "1")
  175. set(CONFIG_SOC_MPU_MIN_REGION_SIZE "0x20000000")
  176. set(CONFIG_SOC_MPU_REGIONS_MAX_NUM "8")
  177. set(CONFIG_SOC_PCNT_GROUPS "1")
  178. set(CONFIG_SOC_PCNT_UNITS_PER_GROUP "4")
  179. set(CONFIG_SOC_PCNT_CHANNELS_PER_UNIT "2")
  180. set(CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT "2")
  181. set(CONFIG_SOC_RMT_GROUPS "1")
  182. set(CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP "4")
  183. set(CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP "4")
  184. set(CONFIG_SOC_RMT_CHANNELS_PER_GROUP "8")
  185. set(CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL "48")
  186. set(CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG "y")
  187. set(CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION "y")
  188. set(CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP "y")
  189. set(CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT "y")
  190. set(CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP "y")
  191. set(CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO "y")
  192. set(CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY "y")
  193. set(CONFIG_SOC_RMT_SUPPORT_XTAL "y")
  194. set(CONFIG_SOC_RMT_SUPPORT_RC_FAST "y")
  195. set(CONFIG_SOC_RMT_SUPPORT_APB "y")
  196. set(CONFIG_SOC_RMT_SUPPORT_DMA "y")
  197. set(CONFIG_SOC_LCD_I80_SUPPORTED "y")
  198. set(CONFIG_SOC_LCD_RGB_SUPPORTED "y")
  199. set(CONFIG_SOC_LCD_I80_BUSES "1")
  200. set(CONFIG_SOC_LCD_RGB_PANELS "1")
  201. set(CONFIG_SOC_LCD_I80_BUS_WIDTH "16")
  202. set(CONFIG_SOC_LCD_RGB_DATA_WIDTH "16")
  203. set(CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV "y")
  204. set(CONFIG_SOC_LCDCAM_I80_NUM_BUSES "1")
  205. set(CONFIG_SOC_LCDCAM_I80_BUS_WIDTH "16")
  206. set(CONFIG_SOC_LCDCAM_RGB_NUM_PANELS "1")
  207. set(CONFIG_SOC_LCDCAM_RGB_DATA_WIDTH "16")
  208. set(CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH "128")
  209. set(CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM "549")
  210. set(CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH "128")
  211. set(CONFIG_SOC_RTCIO_PIN_COUNT "22")
  212. set(CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED "y")
  213. set(CONFIG_SOC_RTCIO_HOLD_SUPPORTED "y")
  214. set(CONFIG_SOC_RTCIO_WAKE_SUPPORTED "y")
  215. set(CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT "y")
  216. set(CONFIG_SOC_SDM_GROUPS "1")
  217. set(CONFIG_SOC_SDM_CHANNELS_PER_GROUP "8")
  218. set(CONFIG_SOC_SDM_CLK_SUPPORT_APB "y")
  219. set(CONFIG_SOC_SPI_PERIPH_NUM "3")
  220. set(CONFIG_SOC_SPI_MAX_CS_NUM "6")
  221. set(CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE "64")
  222. set(CONFIG_SOC_SPI_SUPPORT_DDRCLK "y")
  223. set(CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS "y")
  224. set(CONFIG_SOC_SPI_SUPPORT_CD_SIG "y")
  225. set(CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS "y")
  226. set(CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2 "y")
  227. set(CONFIG_SOC_SPI_SUPPORT_CLK_APB "y")
  228. set(CONFIG_SOC_SPI_SUPPORT_CLK_XTAL "y")
  229. set(CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT "y")
  230. set(CONFIG_SOC_MEMSPI_IS_INDEPENDENT "y")
  231. set(CONFIG_SOC_SPI_MAX_PRE_DIVIDER "16")
  232. set(CONFIG_SOC_SPI_SUPPORT_OCT "y")
  233. set(CONFIG_SOC_SPI_SCT_SUPPORTED "y")
  234. set(CONFIG_SOC_SPI_SCT_REG_NUM "14")
  235. set(CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX "y")
  236. set(CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX "0x3fffa")
  237. set(CONFIG_SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED "y")
  238. set(CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED "y")
  239. set(CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED "y")
  240. set(CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED "y")
  241. set(CONFIG_SOC_SPIRAM_SUPPORTED "y")
  242. set(CONFIG_SOC_SPIRAM_XIP_SUPPORTED "y")
  243. set(CONFIG_SOC_SYSTIMER_COUNTER_NUM "2")
  244. set(CONFIG_SOC_SYSTIMER_ALARM_NUM "3")
  245. set(CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO "32")
  246. set(CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI "20")
  247. set(CONFIG_SOC_SYSTIMER_FIXED_DIVIDER "y")
  248. set(CONFIG_SOC_SYSTIMER_INT_LEVEL "y")
  249. set(CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE "y")
  250. set(CONFIG_SOC_TIMER_GROUPS "2")
  251. set(CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP "2")
  252. set(CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH "54")
  253. set(CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL "y")
  254. set(CONFIG_SOC_TIMER_GROUP_SUPPORT_APB "y")
  255. set(CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS "4")
  256. set(CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO "32")
  257. set(CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI "16")
  258. set(CONFIG_SOC_TOUCH_SENSOR_VERSION "2")
  259. set(CONFIG_SOC_TOUCH_SENSOR_NUM "15")
  260. set(CONFIG_SOC_TOUCH_MIN_CHAN_ID "1")
  261. set(CONFIG_SOC_TOUCH_MAX_CHAN_ID "14")
  262. set(CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK "y")
  263. set(CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP "y")
  264. set(CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF "y")
  265. set(CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING "y")
  266. set(CONFIG_SOC_TOUCH_SUPPORT_DENOISE_CHAN "y")
  267. set(CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM "3")
  268. set(CONFIG_SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED "y")
  269. set(CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM "1")
  270. set(CONFIG_SOC_TWAI_CONTROLLER_NUM "1")
  271. set(CONFIG_SOC_TWAI_MASK_FILTER_NUM "1")
  272. set(CONFIG_SOC_TWAI_CLK_SUPPORT_APB "y")
  273. set(CONFIG_SOC_TWAI_BRP_MIN "2")
  274. set(CONFIG_SOC_TWAI_BRP_MAX "16384")
  275. set(CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS "y")
  276. set(CONFIG_SOC_UART_NUM "3")
  277. set(CONFIG_SOC_UART_HP_NUM "3")
  278. set(CONFIG_SOC_UART_FIFO_LEN "128")
  279. set(CONFIG_SOC_UART_BITRATE_MAX "5000000")
  280. set(CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND "y")
  281. set(CONFIG_SOC_UART_SUPPORT_WAKEUP_INT "y")
  282. set(CONFIG_SOC_UART_SUPPORT_APB_CLK "y")
  283. set(CONFIG_SOC_UART_SUPPORT_RTC_CLK "y")
  284. set(CONFIG_SOC_UART_SUPPORT_XTAL_CLK "y")
  285. set(CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE "y")
  286. set(CONFIG_SOC_UHCI_NUM "1")
  287. set(CONFIG_SOC_USB_OTG_PERIPH_NUM "1")
  288. set(CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE "3968")
  289. set(CONFIG_SOC_SHA_SUPPORT_DMA "y")
  290. set(CONFIG_SOC_SHA_SUPPORT_RESUME "y")
  291. set(CONFIG_SOC_SHA_GDMA "y")
  292. set(CONFIG_SOC_SHA_SUPPORT_SHA1 "y")
  293. set(CONFIG_SOC_SHA_SUPPORT_SHA224 "y")
  294. set(CONFIG_SOC_SHA_SUPPORT_SHA256 "y")
  295. set(CONFIG_SOC_SHA_SUPPORT_SHA384 "y")
  296. set(CONFIG_SOC_SHA_SUPPORT_SHA512 "y")
  297. set(CONFIG_SOC_SHA_SUPPORT_SHA512_224 "y")
  298. set(CONFIG_SOC_SHA_SUPPORT_SHA512_256 "y")
  299. set(CONFIG_SOC_SHA_SUPPORT_SHA512_T "y")
  300. set(CONFIG_SOC_MPI_MEM_BLOCKS_NUM "4")
  301. set(CONFIG_SOC_MPI_OPERATIONS_NUM "3")
  302. set(CONFIG_SOC_RSA_MAX_BIT_LEN "4096")
  303. set(CONFIG_SOC_AES_SUPPORT_DMA "y")
  304. set(CONFIG_SOC_AES_GDMA "y")
  305. set(CONFIG_SOC_AES_SUPPORT_AES_128 "y")
  306. set(CONFIG_SOC_AES_SUPPORT_AES_256 "y")
  307. set(CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP "y")
  308. set(CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP "y")
  309. set(CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP "y")
  310. set(CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP "y")
  311. set(CONFIG_SOC_PM_SUPPORT_BT_WAKEUP "y")
  312. set(CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP "y")
  313. set(CONFIG_SOC_PM_SUPPORT_CPU_PD "y")
  314. set(CONFIG_SOC_PM_SUPPORT_TAGMEM_PD "y")
  315. set(CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD "y")
  316. set(CONFIG_SOC_PM_SUPPORT_RC_FAST_PD "y")
  317. set(CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD "y")
  318. set(CONFIG_SOC_PM_SUPPORT_MAC_BB_PD "y")
  319. set(CONFIG_SOC_PM_SUPPORT_MODEM_PD "y")
  320. set(CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED "y")
  321. set(CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY "y")
  322. set(CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL "y")
  323. set(CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA "y")
  324. set(CONFIG_SOC_PM_MODEM_PD_BY_SW "y")
  325. set(CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED "y")
  326. set(CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 "y")
  327. set(CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION "y")
  328. set(CONFIG_SOC_CLK_XTAL32K_SUPPORTED "y")
  329. set(CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2 "y")
  330. set(CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE "y")
  331. set(CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE "y")
  332. set(CONFIG_SOC_EFUSE_HARD_DIS_JTAG "y")
  333. set(CONFIG_SOC_EFUSE_DIS_USB_JTAG "y")
  334. set(CONFIG_SOC_EFUSE_SOFT_DIS_JTAG "y")
  335. set(CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT "y")
  336. set(CONFIG_SOC_EFUSE_DIS_ICACHE "y")
  337. set(CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK "y")
  338. set(CONFIG_SOC_SECURE_BOOT_V2_RSA "y")
  339. set(CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS "3")
  340. set(CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS "y")
  341. set(CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY "y")
  342. set(CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX "64")
  343. set(CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES "y")
  344. set(CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS "y")
  345. set(CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128 "y")
  346. set(CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256 "y")
  347. set(CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE "16")
  348. set(CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE "256")
  349. set(CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE "21")
  350. set(CONFIG_SOC_MAC_BB_PD_MEM_SIZE "192")
  351. set(CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH "12")
  352. set(CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE "y")
  353. set(CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND "y")
  354. set(CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME "y")
  355. set(CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND "y")
  356. set(CONFIG_SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE "y")
  357. set(CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING "y")
  358. set(CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE "y")
  359. set(CONFIG_SOC_SPI_MEM_SUPPORT_WRAP "y")
  360. set(CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY "y")
  361. set(CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM "y")
  362. set(CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP "y")
  363. set(CONFIG_SOC_COEX_HW_PTI "y")
  364. set(CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE "y")
  365. set(CONFIG_SOC_SDMMC_USE_GPIO_MATRIX "y")
  366. set(CONFIG_SOC_SDMMC_NUM_SLOTS "2")
  367. set(CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK "y")
  368. set(CONFIG_SOC_SDMMC_DELAY_PHASE_NUM "4")
  369. set(CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC "y")
  370. set(CONFIG_SOC_WIFI_HW_TSF "y")
  371. set(CONFIG_SOC_WIFI_FTM_SUPPORT "y")
  372. set(CONFIG_SOC_WIFI_GCMP_SUPPORT "y")
  373. set(CONFIG_SOC_WIFI_WAPI_SUPPORT "y")
  374. set(CONFIG_SOC_WIFI_CSI_SUPPORT "y")
  375. set(CONFIG_SOC_WIFI_MESH_SUPPORT "y")
  376. set(CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW "y")
  377. set(CONFIG_SOC_WIFI_PHY_NEEDS_USB_WORKAROUND "y")
  378. set(CONFIG_SOC_BLE_SUPPORTED "y")
  379. set(CONFIG_SOC_BLE_MESH_SUPPORTED "y")
  380. set(CONFIG_SOC_BLE_50_SUPPORTED "y")
  381. set(CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED "y")
  382. set(CONFIG_SOC_BLUFI_SUPPORTED "y")
  383. set(CONFIG_SOC_ULP_HAS_ADC "y")
  384. set(CONFIG_SOC_PHY_COMBO_MODULE "y")
  385. set(CONFIG_SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV "y")
  386. set(CONFIG_SOC_LCDCAM_CAM_PERIPH_NUM "1")
  387. set(CONFIG_SOC_LCDCAM_CAM_DATA_WIDTH_MAX "16")
  388. set(CONFIG_IDF_CMAKE "y")
  389. set(CONFIG_IDF_TOOLCHAIN "gcc")
  390. set(CONFIG_IDF_TOOLCHAIN_GCC "y")
  391. set(CONFIG_IDF_TARGET_ARCH_XTENSA "y")
  392. set(CONFIG_IDF_TARGET_ARCH "xtensa")
  393. set(CONFIG_IDF_TARGET "esp32s3")
  394. set(CONFIG_IDF_INIT_VERSION "5.5.1")
  395. set(CONFIG_IDF_TARGET_ESP32S3 "y")
  396. set(CONFIG_IDF_FIRMWARE_CHIP_ID "0x9")
  397. set(CONFIG_APP_BUILD_TYPE_APP_2NDBOOT "y")
  398. set(CONFIG_APP_BUILD_TYPE_RAM "")
  399. set(CONFIG_APP_BUILD_GENERATE_BINARIES "y")
  400. set(CONFIG_APP_BUILD_BOOTLOADER "y")
  401. set(CONFIG_APP_BUILD_USE_FLASH_SECTIONS "y")
  402. set(CONFIG_APP_REPRODUCIBLE_BUILD "")
  403. set(CONFIG_APP_NO_BLOBS "")
  404. set(CONFIG_BOOTLOADER_COMPILE_TIME_DATE "y")
  405. set(CONFIG_BOOTLOADER_PROJECT_VER "1")
  406. set(CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE "")
  407. set(CONFIG_BOOTLOADER_OFFSET_IN_FLASH "0x0")
  408. set(CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE "y")
  409. set(CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG "")
  410. set(CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF "")
  411. set(CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE "")
  412. set(CONFIG_BOOTLOADER_LOG_VERSION_1 "y")
  413. set(CONFIG_BOOTLOADER_LOG_VERSION "1")
  414. set(CONFIG_BOOTLOADER_LOG_LEVEL_NONE "")
  415. set(CONFIG_BOOTLOADER_LOG_LEVEL_ERROR "")
  416. set(CONFIG_BOOTLOADER_LOG_LEVEL_WARN "")
  417. set(CONFIG_BOOTLOADER_LOG_LEVEL_INFO "y")
  418. set(CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG "")
  419. set(CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE "")
  420. set(CONFIG_BOOTLOADER_LOG_LEVEL "3")
  421. set(CONFIG_BOOTLOADER_LOG_COLORS "")
  422. set(CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS "y")
  423. set(CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN "y")
  424. set(CONFIG_BOOTLOADER_LOG_MODE_TEXT "y")
  425. set(CONFIG_BOOTLOADER_FLASH_DC_AWARE "")
  426. set(CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT "y")
  427. set(CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V "y")
  428. set(CONFIG_BOOTLOADER_FACTORY_RESET "")
  429. set(CONFIG_BOOTLOADER_APP_TEST "")
  430. set(CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE "y")
  431. set(CONFIG_BOOTLOADER_WDT_ENABLE "y")
  432. set(CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE "")
  433. set(CONFIG_BOOTLOADER_WDT_TIME_MS "9000")
  434. set(CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP "")
  435. set(CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON "")
  436. set(CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS "")
  437. set(CONFIG_BOOTLOADER_RESERVE_RTC_SIZE "0x0")
  438. set(CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC "")
  439. set(CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED "y")
  440. set(CONFIG_SECURE_BOOT_V2_PREFERRED "y")
  441. set(CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT "")
  442. set(CONFIG_SECURE_BOOT "")
  443. set(CONFIG_SECURE_FLASH_ENC_ENABLED "")
  444. set(CONFIG_SECURE_ROM_DL_MODE_ENABLED "y")
  445. set(CONFIG_APP_COMPILE_TIME_DATE "y")
  446. set(CONFIG_APP_EXCLUDE_PROJECT_VER_VAR "")
  447. set(CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR "")
  448. set(CONFIG_APP_PROJECT_VER_FROM_CONFIG "")
  449. set(CONFIG_APP_RETRIEVE_LEN_ELF_SHA "9")
  450. set(CONFIG_ESP_ROM_HAS_CRC_LE "y")
  451. set(CONFIG_ESP_ROM_HAS_CRC_BE "y")
  452. set(CONFIG_ESP_ROM_HAS_MZ_CRC32 "y")
  453. set(CONFIG_ESP_ROM_HAS_JPEG_DECODE "y")
  454. set(CONFIG_ESP_ROM_UART_CLK_IS_XTAL "y")
  455. set(CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING "y")
  456. set(CONFIG_ESP_ROM_USB_OTG_NUM "3")
  457. set(CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM "4")
  458. set(CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG "y")
  459. set(CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV "y")
  460. set(CONFIG_ESP_ROM_GET_CLK_FREQ "y")
  461. set(CONFIG_ESP_ROM_HAS_HAL_WDT "y")
  462. set(CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND "y")
  463. set(CONFIG_ESP_ROM_HAS_LAYOUT_TABLE "y")
  464. set(CONFIG_ESP_ROM_HAS_SPI_FLASH "y")
  465. set(CONFIG_ESP_ROM_HAS_SPI_FLASH_MMAP "y")
  466. set(CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG "y")
  467. set(CONFIG_ESP_ROM_HAS_NEWLIB "y")
  468. set(CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT "y")
  469. set(CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME "y")
  470. set(CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE "y")
  471. set(CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT "y")
  472. set(CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG "y")
  473. set(CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG "y")
  474. set(CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG "y")
  475. set(CONFIG_ESP_ROM_HAS_SW_FLOAT "y")
  476. set(CONFIG_ESP_ROM_HAS_VERSION "y")
  477. set(CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB "y")
  478. set(CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC "y")
  479. set(CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY "y")
  480. set(CONFIG_BOOT_ROM_LOG_ALWAYS_ON "y")
  481. set(CONFIG_BOOT_ROM_LOG_ALWAYS_OFF "")
  482. set(CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH "")
  483. set(CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW "")
  484. set(CONFIG_ESPTOOLPY_NO_STUB "")
  485. set(CONFIG_ESPTOOLPY_OCT_FLASH "")
  486. set(CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT "y")
  487. set(CONFIG_ESPTOOLPY_FLASHMODE_QIO "")
  488. set(CONFIG_ESPTOOLPY_FLASHMODE_QOUT "")
  489. set(CONFIG_ESPTOOLPY_FLASHMODE_DIO "y")
  490. set(CONFIG_ESPTOOLPY_FLASHMODE_DOUT "")
  491. set(CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR "y")
  492. set(CONFIG_ESPTOOLPY_FLASHMODE "dio")
  493. set(CONFIG_ESPTOOLPY_FLASHFREQ_120M "")
  494. set(CONFIG_ESPTOOLPY_FLASHFREQ_80M "y")
  495. set(CONFIG_ESPTOOLPY_FLASHFREQ_40M "")
  496. set(CONFIG_ESPTOOLPY_FLASHFREQ_20M "")
  497. set(CONFIG_ESPTOOLPY_FLASHFREQ "80m")
  498. set(CONFIG_ESPTOOLPY_FLASHSIZE_1MB "")
  499. set(CONFIG_ESPTOOLPY_FLASHSIZE_2MB "y")
  500. set(CONFIG_ESPTOOLPY_FLASHSIZE_4MB "")
  501. set(CONFIG_ESPTOOLPY_FLASHSIZE_8MB "")
  502. set(CONFIG_ESPTOOLPY_FLASHSIZE_16MB "")
  503. set(CONFIG_ESPTOOLPY_FLASHSIZE_32MB "")
  504. set(CONFIG_ESPTOOLPY_FLASHSIZE_64MB "")
  505. set(CONFIG_ESPTOOLPY_FLASHSIZE_128MB "")
  506. set(CONFIG_ESPTOOLPY_FLASHSIZE "2MB")
  507. set(CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE "")
  508. set(CONFIG_ESPTOOLPY_BEFORE_RESET "y")
  509. set(CONFIG_ESPTOOLPY_BEFORE_NORESET "")
  510. set(CONFIG_ESPTOOLPY_BEFORE "default_reset")
  511. set(CONFIG_ESPTOOLPY_AFTER_RESET "y")
  512. set(CONFIG_ESPTOOLPY_AFTER_NORESET "")
  513. set(CONFIG_ESPTOOLPY_AFTER "hard_reset")
  514. set(CONFIG_ESPTOOLPY_MONITOR_BAUD "115200")
  515. set(CONFIG_PARTITION_TABLE_SINGLE_APP "y")
  516. set(CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE "")
  517. set(CONFIG_PARTITION_TABLE_TWO_OTA "")
  518. set(CONFIG_PARTITION_TABLE_TWO_OTA_LARGE "")
  519. set(CONFIG_PARTITION_TABLE_CUSTOM "")
  520. set(CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv")
  521. set(CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv")
  522. set(CONFIG_PARTITION_TABLE_OFFSET "0x8000")
  523. set(CONFIG_PARTITION_TABLE_MD5 "y")
  524. set(CONFIG_COMPILER_OPTIMIZATION_DEBUG "y")
  525. set(CONFIG_COMPILER_OPTIMIZATION_SIZE "")
  526. set(CONFIG_COMPILER_OPTIMIZATION_PERF "")
  527. set(CONFIG_COMPILER_OPTIMIZATION_NONE "")
  528. set(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE "y")
  529. set(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT "")
  530. set(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE "")
  531. set(CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE "y")
  532. set(CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB "y")
  533. set(CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL "2")
  534. set(CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT "")
  535. set(CONFIG_COMPILER_HIDE_PATHS_MACROS "y")
  536. set(CONFIG_COMPILER_CXX_EXCEPTIONS "")
  537. set(CONFIG_COMPILER_CXX_RTTI "")
  538. set(CONFIG_COMPILER_STACK_CHECK_MODE_NONE "y")
  539. set(CONFIG_COMPILER_STACK_CHECK_MODE_NORM "")
  540. set(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG "")
  541. set(CONFIG_COMPILER_STACK_CHECK_MODE_ALL "")
  542. set(CONFIG_COMPILER_NO_MERGE_CONSTANTS "")
  543. set(CONFIG_COMPILER_WARN_WRITE_STRINGS "")
  544. set(CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS "y")
  545. set(CONFIG_COMPILER_DISABLE_GCC12_WARNINGS "")
  546. set(CONFIG_COMPILER_DISABLE_GCC13_WARNINGS "")
  547. set(CONFIG_COMPILER_DISABLE_GCC14_WARNINGS "")
  548. set(CONFIG_COMPILER_DUMP_RTL_FILES "")
  549. set(CONFIG_COMPILER_RT_LIB_GCCLIB "y")
  550. set(CONFIG_COMPILER_RT_LIB_NAME "gcc")
  551. set(CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING "y")
  552. set(CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE "")
  553. set(CONFIG_COMPILER_STATIC_ANALYZER "")
  554. set(CONFIG_EFUSE_CUSTOM_TABLE "")
  555. set(CONFIG_EFUSE_VIRTUAL "")
  556. set(CONFIG_EFUSE_MAX_BLK_LEN "256")
  557. set(CONFIG_ESP_ERR_TO_NAME_LOOKUP "y")
  558. set(CONFIG_ESP32S3_REV_MIN_0 "y")
  559. set(CONFIG_ESP32S3_REV_MIN_1 "")
  560. set(CONFIG_ESP32S3_REV_MIN_2 "")
  561. set(CONFIG_ESP32S3_REV_MIN_FULL "0")
  562. set(CONFIG_ESP_REV_MIN_FULL "0")
  563. set(CONFIG_ESP32S3_REV_MAX_FULL "99")
  564. set(CONFIG_ESP_REV_MAX_FULL "99")
  565. set(CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL "0")
  566. set(CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL "199")
  567. set(CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA "y")
  568. set(CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP "y")
  569. set(CONFIG_ESP_MAC_ADDR_UNIVERSE_BT "y")
  570. set(CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH "y")
  571. set(CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR "y")
  572. set(CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES "4")
  573. set(CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO "")
  574. set(CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR "y")
  575. set(CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES "4")
  576. set(CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC "")
  577. set(CONFIG_ESP_SLEEP_POWER_DOWN_FLASH "")
  578. set(CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND "y")
  579. set(CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU "y")
  580. set(CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND "y")
  581. set(CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND "y")
  582. set(CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY "2000")
  583. set(CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION "")
  584. set(CONFIG_ESP_SLEEP_DEBUG "")
  585. set(CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS "y")
  586. set(CONFIG_RTC_CLK_SRC_INT_RC "y")
  587. set(CONFIG_RTC_CLK_SRC_EXT_CRYS "")
  588. set(CONFIG_RTC_CLK_SRC_EXT_OSC "")
  589. set(CONFIG_RTC_CLK_SRC_INT_8MD256 "")
  590. set(CONFIG_RTC_CLK_CAL_CYCLES "1024")
  591. set(CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM "y")
  592. set(CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM "y")
  593. set(CONFIG_GDMA_CTRL_FUNC_IN_IRAM "y")
  594. set(CONFIG_GDMA_ISR_HANDLER_IN_IRAM "y")
  595. set(CONFIG_GDMA_OBJ_DRAM_SAFE "y")
  596. set(CONFIG_GDMA_ENABLE_DEBUG_LOG "")
  597. set(CONFIG_GDMA_ISR_IRAM_SAFE "")
  598. set(CONFIG_XTAL_FREQ_40 "y")
  599. set(CONFIG_XTAL_FREQ "40")
  600. set(CONFIG_ESP_BROWNOUT_DET "y")
  601. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 "y")
  602. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 "")
  603. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 "")
  604. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 "")
  605. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 "")
  606. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 "")
  607. set(CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 "")
  608. set(CONFIG_ESP_BROWNOUT_DET_LVL "7")
  609. set(CONFIG_ESP_BROWNOUT_USE_INTR "y")
  610. set(CONFIG_ESP_INTR_IN_IRAM "y")
  611. set(CONFIG_ESP_ROM_PRINT_IN_IRAM "y")
  612. set(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 "")
  613. set(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 "y")
  614. set(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 "")
  615. set(CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ "160")
  616. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB "y")
  617. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB "")
  618. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE "0x4000")
  619. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS "")
  620. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS "y")
  621. set(CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS "8")
  622. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B "")
  623. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B "y")
  624. set(CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE "32")
  625. set(CONFIG_ESP32S3_DATA_CACHE_16KB "")
  626. set(CONFIG_ESP32S3_DATA_CACHE_32KB "y")
  627. set(CONFIG_ESP32S3_DATA_CACHE_64KB "")
  628. set(CONFIG_ESP32S3_DATA_CACHE_SIZE "0x8000")
  629. set(CONFIG_ESP32S3_DATA_CACHE_4WAYS "")
  630. set(CONFIG_ESP32S3_DATA_CACHE_8WAYS "y")
  631. set(CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS "8")
  632. set(CONFIG_ESP32S3_DATA_CACHE_LINE_16B "")
  633. set(CONFIG_ESP32S3_DATA_CACHE_LINE_32B "y")
  634. set(CONFIG_ESP32S3_DATA_CACHE_LINE_64B "")
  635. set(CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE "32")
  636. set(CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM "")
  637. set(CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE "")
  638. set(CONFIG_ESP32S3_TRAX "")
  639. set(CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM "0x0")
  640. set(CONFIG_ESP_SYSTEM_IN_IRAM "y")
  641. set(CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT "")
  642. set(CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT "y")
  643. set(CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT "")
  644. set(CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS "0")
  645. set(CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK "y")
  646. set(CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP "y")
  647. set(CONFIG_ESP_SYSTEM_MEMPROT_FEATURE "y")
  648. set(CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK "y")
  649. set(CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE "32")
  650. set(CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE "2304")
  651. set(CONFIG_ESP_MAIN_TASK_STACK_SIZE "3584")
  652. set(CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 "y")
  653. set(CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 "")
  654. set(CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY "")
  655. set(CONFIG_ESP_MAIN_TASK_AFFINITY "0x0")
  656. set(CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE "2048")
  657. set(CONFIG_ESP_CONSOLE_UART_DEFAULT "y")
  658. set(CONFIG_ESP_CONSOLE_USB_CDC "")
  659. set(CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG "")
  660. set(CONFIG_ESP_CONSOLE_UART_CUSTOM "")
  661. set(CONFIG_ESP_CONSOLE_NONE "")
  662. set(CONFIG_ESP_CONSOLE_SECONDARY_NONE "")
  663. set(CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG "y")
  664. set(CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED "y")
  665. set(CONFIG_ESP_CONSOLE_UART "y")
  666. set(CONFIG_ESP_CONSOLE_UART_NUM "0")
  667. set(CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM "0")
  668. set(CONFIG_ESP_CONSOLE_UART_BAUDRATE "115200")
  669. set(CONFIG_ESP_INT_WDT "y")
  670. set(CONFIG_ESP_INT_WDT_TIMEOUT_MS "300")
  671. set(CONFIG_ESP_INT_WDT_CHECK_CPU1 "y")
  672. set(CONFIG_ESP_TASK_WDT_EN "y")
  673. set(CONFIG_ESP_TASK_WDT_INIT "y")
  674. set(CONFIG_ESP_TASK_WDT_PANIC "")
  675. set(CONFIG_ESP_TASK_WDT_TIMEOUT_S "5")
  676. set(CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 "y")
  677. set(CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 "y")
  678. set(CONFIG_ESP_PANIC_HANDLER_IRAM "")
  679. set(CONFIG_ESP_DEBUG_STUBS_ENABLE "")
  680. set(CONFIG_ESP_DEBUG_OCDAWARE "y")
  681. set(CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 "y")
  682. set(CONFIG_ESP_SYSTEM_BBPLL_RECALIB "y")
  683. set(CONFIG_ESP_IPC_ENABLE "y")
  684. set(CONFIG_ESP_IPC_TASK_STACK_SIZE "1280")
  685. set(CONFIG_ESP_IPC_USES_CALLERS_PRIORITY "y")
  686. set(CONFIG_ESP_IPC_ISR_ENABLE "y")
  687. set(CONFIG_FREERTOS_SMP "")
  688. set(CONFIG_FREERTOS_UNICORE "")
  689. set(CONFIG_FREERTOS_HZ "100")
  690. set(CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE "")
  691. set(CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL "")
  692. set(CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY "y")
  693. set(CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS "1")
  694. set(CONFIG_FREERTOS_IDLE_TASK_STACKSIZE "1536")
  695. set(CONFIG_FREERTOS_USE_IDLE_HOOK "")
  696. set(CONFIG_FREERTOS_USE_TICK_HOOK "")
  697. set(CONFIG_FREERTOS_MAX_TASK_NAME_LEN "16")
  698. set(CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY "")
  699. set(CONFIG_FREERTOS_USE_TIMERS "y")
  700. set(CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME "Tmr Svc")
  701. set(CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 "")
  702. set(CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1 "")
  703. set(CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY "y")
  704. set(CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY "0x7fffffff")
  705. set(CONFIG_FREERTOS_TIMER_TASK_PRIORITY "1")
  706. set(CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH "2048")
  707. set(CONFIG_FREERTOS_TIMER_QUEUE_LENGTH "10")
  708. set(CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE "0")
  709. set(CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES "1")
  710. set(CONFIG_FREERTOS_USE_TRACE_FACILITY "")
  711. set(CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES "")
  712. set(CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS "")
  713. set(CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG "")
  714. set(CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER "y")
  715. set(CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK "")
  716. set(CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS "y")
  717. set(CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK "")
  718. set(CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP "")
  719. set(CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER "y")
  720. set(CONFIG_FREERTOS_ISR_STACKSIZE "1536")
  721. set(CONFIG_FREERTOS_INTERRUPT_BACKTRACE "y")
  722. set(CONFIG_FREERTOS_FPU_IN_ISR "")
  723. set(CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER "y")
  724. set(CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 "y")
  725. set(CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 "")
  726. set(CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER "y")
  727. set(CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH "")
  728. set(CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE "")
  729. set(CONFIG_FREERTOS_PORT "y")
  730. set(CONFIG_FREERTOS_NO_AFFINITY "0x7fffffff")
  731. set(CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION "y")
  732. set(CONFIG_FREERTOS_DEBUG_OCDAWARE "y")
  733. set(CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT "y")
  734. set(CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH "y")
  735. set(CONFIG_FREERTOS_NUMBER_OF_CORES "2")
  736. set(CONFIG_FREERTOS_IN_IRAM "y")
  737. set(CONFIG_HAL_ASSERTION_EQUALS_SYSTEM "y")
  738. set(CONFIG_HAL_ASSERTION_DISABLE "")
  739. set(CONFIG_HAL_ASSERTION_SILENT "")
  740. set(CONFIG_HAL_ASSERTION_ENABLE "")
  741. set(CONFIG_HAL_DEFAULT_ASSERTION_LEVEL "2")
  742. set(CONFIG_HAL_WDT_USE_ROM_IMPL "y")
  743. set(CONFIG_LOG_VERSION_1 "y")
  744. set(CONFIG_LOG_VERSION_2 "")
  745. set(CONFIG_LOG_VERSION "1")
  746. set(CONFIG_LOG_DEFAULT_LEVEL_NONE "")
  747. set(CONFIG_LOG_DEFAULT_LEVEL_ERROR "")
  748. set(CONFIG_LOG_DEFAULT_LEVEL_WARN "")
  749. set(CONFIG_LOG_DEFAULT_LEVEL_INFO "y")
  750. set(CONFIG_LOG_DEFAULT_LEVEL_DEBUG "")
  751. set(CONFIG_LOG_DEFAULT_LEVEL_VERBOSE "")
  752. set(CONFIG_LOG_DEFAULT_LEVEL "3")
  753. set(CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT "y")
  754. set(CONFIG_LOG_MAXIMUM_LEVEL_DEBUG "")
  755. set(CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE "")
  756. set(CONFIG_LOG_MAXIMUM_LEVEL "3")
  757. set(CONFIG_LOG_MASTER_LEVEL "")
  758. set(CONFIG_LOG_DYNAMIC_LEVEL_CONTROL "y")
  759. set(CONFIG_LOG_TAG_LEVEL_IMPL_NONE "")
  760. set(CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST "")
  761. set(CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST "y")
  762. set(CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY "")
  763. set(CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP "y")
  764. set(CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE "31")
  765. set(CONFIG_LOG_COLORS "")
  766. set(CONFIG_LOG_TIMESTAMP_SOURCE_RTOS "y")
  767. set(CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM "")
  768. set(CONFIG_LOG_MODE_TEXT_EN "y")
  769. set(CONFIG_LOG_MODE_TEXT "y")
  770. set(CONFIG_LOG_IN_IRAM "y")
  771. set(CONFIG_LIBC_NEWLIB "y")
  772. set(CONFIG_LIBC_MISC_IN_IRAM "y")
  773. set(CONFIG_LIBC_LOCKS_PLACE_IN_IRAM "y")
  774. set(CONFIG_LIBC_NEWLIB_NANO_FORMAT "")
  775. set(CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT "y")
  776. set(CONFIG_LIBC_TIME_SYSCALL_USE_RTC "")
  777. set(CONFIG_LIBC_TIME_SYSCALL_USE_HRT "")
  778. set(CONFIG_LIBC_TIME_SYSCALL_USE_NONE "")
  779. set(CONFIG_MMU_PAGE_SIZE_64KB "y")
  780. set(CONFIG_MMU_PAGE_MODE "64KB")
  781. set(CONFIG_MMU_PAGE_SIZE "0x10000")
  782. set(CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC "y")
  783. set(CONFIG_SPI_FLASH_BROWNOUT_RESET "y")
  784. set(CONFIG_SPI_FLASH_HPM_ENA "")
  785. set(CONFIG_SPI_FLASH_HPM_AUTO "y")
  786. set(CONFIG_SPI_FLASH_HPM_DIS "")
  787. set(CONFIG_SPI_FLASH_HPM_ON "y")
  788. set(CONFIG_SPI_FLASH_HPM_DC_AUTO "y")
  789. set(CONFIG_SPI_FLASH_HPM_DC_DISABLE "")
  790. set(CONFIG_SPI_FLASH_AUTO_SUSPEND "")
  791. set(CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US "50")
  792. set(CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND "")
  793. set(CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND "")
  794. set(CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM "y")
  795. set(CONFIG_SPI_FLASH_VERIFY_WRITE "")
  796. set(CONFIG_SPI_FLASH_ENABLE_COUNTERS "")
  797. set(CONFIG_SPI_FLASH_ROM_DRIVER_PATCH "y")
  798. set(CONFIG_SPI_FLASH_ROM_IMPL "")
  799. set(CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS "y")
  800. set(CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS "")
  801. set(CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED "")
  802. set(CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE "")
  803. set(CONFIG_SPI_FLASH_YIELD_DURING_ERASE "y")
  804. set(CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS "20")
  805. set(CONFIG_SPI_FLASH_ERASE_YIELD_TICKS "1")
  806. set(CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE "8192")
  807. set(CONFIG_SPI_FLASH_SIZE_OVERRIDE "")
  808. set(CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED "")
  809. set(CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST "")
  810. set(CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORT_ENABLED "y")
  811. set(CONFIG_SPI_FLASH_VENDOR_GD_SUPPORT_ENABLED "y")
  812. set(CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORT_ENABLED "y")
  813. set(CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORT_ENABLED "y")
  814. set(CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORT_ENABLED "y")
  815. set(CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORT_ENABLED "y")
  816. set(CONFIG_SPI_FLASH_VENDOR_TH_SUPPORT_ENABLED "y")
  817. set(CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP "y")
  818. set(CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP "y")
  819. set(CONFIG_SPI_FLASH_SUPPORT_GD_CHIP "y")
  820. set(CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP "y")
  821. set(CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP "y")
  822. set(CONFIG_SPI_FLASH_SUPPORT_TH_CHIP "y")
  823. set(CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP "y")
  824. set(CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE "y")
  825. set(CONFIG_IDF_EXPERIMENTAL_FEATURES "")
  826. set(CONFIGS_LIST CONFIG_SOC_ADC_SUPPORTED;CONFIG_SOC_UART_SUPPORTED;CONFIG_SOC_PCNT_SUPPORTED;CONFIG_SOC_PHY_SUPPORTED;CONFIG_SOC_WIFI_SUPPORTED;CONFIG_SOC_TWAI_SUPPORTED;CONFIG_SOC_GDMA_SUPPORTED;CONFIG_SOC_UHCI_SUPPORTED;CONFIG_SOC_AHB_GDMA_SUPPORTED;CONFIG_SOC_GPTIMER_SUPPORTED;CONFIG_SOC_LCDCAM_SUPPORTED;CONFIG_SOC_LCDCAM_CAM_SUPPORTED;CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED;CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED;CONFIG_SOC_MCPWM_SUPPORTED;CONFIG_SOC_DEDICATED_GPIO_SUPPORTED;CONFIG_SOC_CACHE_SUPPORT_WRAP;CONFIG_SOC_ULP_SUPPORTED;CONFIG_SOC_ULP_FSM_SUPPORTED;CONFIG_SOC_RISCV_COPROC_SUPPORTED;CONFIG_SOC_BT_SUPPORTED;CONFIG_SOC_USB_OTG_SUPPORTED;CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED;CONFIG_SOC_CCOMP_TIMER_SUPPORTED;CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED;CONFIG_SOC_SUPPORTS_SECURE_DL_MODE;CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD;CONFIG_SOC_EFUSE_SUPPORTED;CONFIG_SOC_SDMMC_HOST_SUPPORTED;CONFIG_SOC_RTC_FAST_MEM_SUPPORTED;CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED;CONFIG_SOC_RTC_MEM_SUPPORTED;CONFIG_SOC_PSRAM_DMA_CAPABLE;CONFIG_SOC_XT_WDT_SUPPORTED;CONFIG_SOC_I2S_SUPPORTED;CONFIG_SOC_RMT_SUPPORTED;CONFIG_SOC_SDM_SUPPORTED;CONFIG_SOC_GPSPI_SUPPORTED;CONFIG_SOC_LEDC_SUPPORTED;CONFIG_SOC_I2C_SUPPORTED;CONFIG_SOC_SYSTIMER_SUPPORTED;CONFIG_SOC_SUPPORT_COEXISTENCE;CONFIG_SOC_TEMP_SENSOR_SUPPORTED;CONFIG_SOC_AES_SUPPORTED;CONFIG_SOC_MPI_SUPPORTED;CONFIG_SOC_SHA_SUPPORTED;CONFIG_SOC_HMAC_SUPPORTED;CONFIG_SOC_DIG_SIGN_SUPPORTED;CONFIG_SOC_FLASH_ENC_SUPPORTED;CONFIG_SOC_SECURE_BOOT_SUPPORTED;CONFIG_SOC_MEMPROT_SUPPORTED;CONFIG_SOC_TOUCH_SENSOR_SUPPORTED;CONFIG_SOC_BOD_SUPPORTED;CONFIG_SOC_CLK_TREE_SUPPORTED;CONFIG_SOC_MPU_SUPPORTED;CONFIG_SOC_WDT_SUPPORTED;CONFIG_SOC_SPI_FLASH_SUPPORTED;CONFIG_SOC_RNG_SUPPORTED;CONFIG_SOC_LIGHT_SLEEP_SUPPORTED;CONFIG_SOC_DEEP_SLEEP_SUPPORTED;CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT;CONFIG_SOC_PM_SUPPORTED;CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED;CONFIG_SOC_XTAL_SUPPORT_40M;CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG;CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED;CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED;CONFIG_SOC_ADC_ARBITER_SUPPORTED;CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED;CONFIG_SOC_ADC_MONITOR_SUPPORTED;CONFIG_SOC_ADC_DMA_SUPPORTED;CONFIG_SOC_ADC_PERIPH_NUM;CONFIG_SOC_ADC_MAX_CHANNEL_NUM;CONFIG_SOC_ADC_ATTEN_NUM;CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM;CONFIG_SOC_ADC_PATT_LEN_MAX;CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH;CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH;CONFIG_SOC_ADC_DIGI_RESULT_BYTES;CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV;CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM;CONFIG_SOC_ADC_DIGI_MONITOR_NUM;CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH;CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW;CONFIG_SOC_ADC_RTC_MIN_BITWIDTH;CONFIG_SOC_ADC_RTC_MAX_BITWIDTH;CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED;CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED;CONFIG_SOC_ADC_SHARED_POWER;CONFIG_SOC_APB_BACKUP_DMA;CONFIG_SOC_BROWNOUT_RESET_SUPPORTED;CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED;CONFIG_SOC_CACHE_FREEZE_SUPPORTED;CONFIG_SOC_CACHE_ACS_INVALID_STATE_ON_PANIC;CONFIG_SOC_CPU_CORES_NUM;CONFIG_SOC_CPU_INTR_NUM;CONFIG_SOC_CPU_HAS_FPU;CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES;CONFIG_SOC_CPU_BREAKPOINTS_NUM;CONFIG_SOC_CPU_WATCHPOINTS_NUM;CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE;CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT;CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN;CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH;CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US;CONFIG_SOC_AHB_GDMA_VERSION;CONFIG_SOC_GDMA_NUM_GROUPS_MAX;CONFIG_SOC_GDMA_PAIRS_PER_GROUP;CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX;CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM;CONFIG_SOC_GPIO_PORT;CONFIG_SOC_GPIO_PIN_COUNT;CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER;CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB;CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT;CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD;CONFIG_SOC_GPIO_VALID_GPIO_MASK;CONFIG_SOC_GPIO_IN_RANGE_MAX;CONFIG_SOC_GPIO_OUT_RANGE_MAX;CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK;CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX;CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM;CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP;CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM;CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM;CONFIG_SOC_DEDIC_GPIO_OUT_AUTO_ENABLE;CONFIG_SOC_I2C_NUM;CONFIG_SOC_HP_I2C_NUM;CONFIG_SOC_I2C_FIFO_LEN;CONFIG_SOC_I2C_CMD_REG_NUM;CONFIG_SOC_I2C_SUPPORT_SLAVE;CONFIG_SOC_I2C_SUPPORT_HW_CLR_BUS;CONFIG_SOC_I2C_SUPPORT_XTAL;CONFIG_SOC_I2C_SUPPORT_RTC;CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR;CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST;CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS;CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE;CONFIG_SOC_I2S_NUM;CONFIG_SOC_I2S_HW_VERSION_2;CONFIG_SOC_I2S_SUPPORTS_XTAL;CONFIG_SOC_I2S_SUPPORTS_PLL_F160M;CONFIG_SOC_I2S_SUPPORTS_PCM;CONFIG_SOC_I2S_SUPPORTS_PDM;CONFIG_SOC_I2S_SUPPORTS_PDM_TX;CONFIG_SOC_I2S_SUPPORTS_PCM2PDM;CONFIG_SOC_I2S_SUPPORTS_PDM_RX;CONFIG_SOC_I2S_SUPPORTS_PDM2PCM;CONFIG_SOC_I2S_PDM_MAX_TX_LINES;CONFIG_SOC_I2S_PDM_MAX_RX_LINES;CONFIG_SOC_I2S_SUPPORTS_TDM;CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK;CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK;CONFIG_SOC_LEDC_TIMER_NUM;CONFIG_SOC_LEDC_CHANNEL_NUM;CONFIG_SOC_LEDC_TIMER_BIT_WIDTH;CONFIG_SOC_LEDC_SUPPORT_FADE_STOP;CONFIG_SOC_MCPWM_GROUPS;CONFIG_SOC_MCPWM_TIMERS_PER_GROUP;CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP;CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR;CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR;CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR;CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP;CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP;CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER;CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP;CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE;CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM;CONFIG_SOC_MMU_PERIPH_NUM;CONFIG_SOC_MPU_MIN_REGION_SIZE;CONFIG_SOC_MPU_REGIONS_MAX_NUM;CONFIG_SOC_PCNT_GROUPS;CONFIG_SOC_PCNT_UNITS_PER_GROUP;CONFIG_SOC_PCNT_CHANNELS_PER_UNIT;CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT;CONFIG_SOC_RMT_GROUPS;CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP;CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP;CONFIG_SOC_RMT_CHANNELS_PER_GROUP;CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL;CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG;CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION;CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP;CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT;CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP;CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO;CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY;CONFIG_SOC_RMT_SUPPORT_XTAL;CONFIG_SOC_RMT_SUPPORT_RC_FAST;CONFIG_SOC_RMT_SUPPORT_APB;CONFIG_SOC_RMT_SUPPORT_DMA;CONFIG_SOC_LCD_I80_SUPPORTED;CONFIG_SOC_LCD_RGB_SUPPORTED;CONFIG_SOC_LCD_I80_BUSES;CONFIG_SOC_LCD_RGB_PANELS;CONFIG_SOC_LCD_I80_BUS_WIDTH;CONFIG_SOC_LCD_RGB_DATA_WIDTH;CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV;CONFIG_SOC_LCDCAM_I80_NUM_BUSES;CONFIG_SOC_LCDCAM_I80_BUS_WIDTH;CONFIG_SOC_LCDCAM_RGB_NUM_PANELS;CONFIG_SOC_LCDCAM_RGB_DATA_WIDTH;CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH;CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM;CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH;CONFIG_SOC_RTCIO_PIN_COUNT;CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED;CONFIG_SOC_RTCIO_HOLD_SUPPORTED;CONFIG_SOC_RTCIO_WAKE_SUPPORTED;CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT;CONFIG_SOC_SDM_GROUPS;CONFIG_SOC_SDM_CHANNELS_PER_GROUP;CONFIG_SOC_SDM_CLK_SUPPORT_APB;CONFIG_SOC_SPI_PERIPH_NUM;CONFIG_SOC_SPI_MAX_CS_NUM;CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE;CONFIG_SOC_SPI_SUPPORT_DDRCLK;CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS;CONFIG_SOC_SPI_SUPPORT_CD_SIG;CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS;CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2;CONFIG_SOC_SPI_SUPPORT_CLK_APB;CONFIG_SOC_SPI_SUPPORT_CLK_XTAL;CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT;CONFIG_SOC_MEMSPI_IS_INDEPENDENT;CONFIG_SOC_SPI_MAX_PRE_DIVIDER;CONFIG_SOC_SPI_SUPPORT_OCT;CONFIG_SOC_SPI_SCT_SUPPORTED;CONFIG_SOC_SPI_SCT_REG_NUM;CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX;CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX;CONFIG_SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED;CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED;CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED;CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED;CONFIG_SOC_SPIRAM_SUPPORTED;CONFIG_SOC_SPIRAM_XIP_SUPPORTED;CONFIG_SOC_SYSTIMER_COUNTER_NUM;CONFIG_SOC_SYSTIMER_ALARM_NUM;CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO;CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI;CONFIG_SOC_SYSTIMER_FIXED_DIVIDER;CONFIG_SOC_SYSTIMER_INT_LEVEL;CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE;CONFIG_SOC_TIMER_GROUPS;CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP;CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH;CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL;CONFIG_SOC_TIMER_GROUP_SUPPORT_APB;CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS;CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO;CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI;CONFIG_SOC_TOUCH_SENSOR_VERSION;CONFIG_SOC_TOUCH_SENSOR_NUM;CONFIG_SOC_TOUCH_MIN_CHAN_ID;CONFIG_SOC_TOUCH_MAX_CHAN_ID;CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK;CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP;CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF;CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING;CONFIG_SOC_TOUCH_SUPPORT_DENOISE_CHAN;CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM;CONFIG_SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED;CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM;CONFIG_SOC_TWAI_CONTROLLER_NUM;CONFIG_SOC_TWAI_MASK_FILTER_NUM;CONFIG_SOC_TWAI_CLK_SUPPORT_APB;CONFIG_SOC_TWAI_BRP_MIN;CONFIG_SOC_TWAI_BRP_MAX;CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS;CONFIG_SOC_UART_NUM;CONFIG_SOC_UART_HP_NUM;CONFIG_SOC_UART_FIFO_LEN;CONFIG_SOC_UART_BITRATE_MAX;CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND;CONFIG_SOC_UART_SUPPORT_WAKEUP_INT;CONFIG_SOC_UART_SUPPORT_APB_CLK;CONFIG_SOC_UART_SUPPORT_RTC_CLK;CONFIG_SOC_UART_SUPPORT_XTAL_CLK;CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE;CONFIG_SOC_UHCI_NUM;CONFIG_SOC_USB_OTG_PERIPH_NUM;CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE;CONFIG_SOC_SHA_SUPPORT_DMA;CONFIG_SOC_SHA_SUPPORT_RESUME;CONFIG_SOC_SHA_GDMA;CONFIG_SOC_SHA_SUPPORT_SHA1;CONFIG_SOC_SHA_SUPPORT_SHA224;CONFIG_SOC_SHA_SUPPORT_SHA256;CONFIG_SOC_SHA_SUPPORT_SHA384;CONFIG_SOC_SHA_SUPPORT_SHA512;CONFIG_SOC_SHA_SUPPORT_SHA512_224;CONFIG_SOC_SHA_SUPPORT_SHA512_256;CONFIG_SOC_SHA_SUPPORT_SHA512_T;CONFIG_SOC_MPI_MEM_BLOCKS_NUM;CONFIG_SOC_MPI_OPERATIONS_NUM;CONFIG_SOC_RSA_MAX_BIT_LEN;CONFIG_SOC_AES_SUPPORT_DMA;CONFIG_SOC_AES_GDMA;CONFIG_SOC_AES_SUPPORT_AES_128;CONFIG_SOC_AES_SUPPORT_AES_256;CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP;CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP;CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP;CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP;CONFIG_SOC_PM_SUPPORT_BT_WAKEUP;CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP;CONFIG_SOC_PM_SUPPORT_CPU_PD;CONFIG_SOC_PM_SUPPORT_TAGMEM_PD;CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD;CONFIG_SOC_PM_SUPPORT_RC_FAST_PD;CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD;CONFIG_SOC_PM_SUPPORT_MAC_BB_PD;CONFIG_SOC_PM_SUPPORT_MODEM_PD;CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED;CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY;CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL;CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA;CONFIG_SOC_PM_MODEM_PD_BY_SW;CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED;CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256;CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION;CONFIG_SOC_CLK_XTAL32K_SUPPORTED;CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2;CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE;CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE;CONFIG_SOC_EFUSE_HARD_DIS_JTAG;CONFIG_SOC_EFUSE_DIS_USB_JTAG;CONFIG_SOC_EFUSE_SOFT_DIS_JTAG;CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT;CONFIG_SOC_EFUSE_DIS_ICACHE;CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK;CONFIG_SOC_SECURE_BOOT_V2_RSA;CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS;CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS;CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY;CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX;CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES;CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS;CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128;CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256;CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE;CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE;CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE;CONFIG_SOC_MAC_BB_PD_MEM_SIZE;CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH;CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE;CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND;CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME;CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND;CONFIG_SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE;CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING;CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE;CONFIG_SOC_SPI_MEM_SUPPORT_WRAP;CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY;CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM;CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP;CONFIG_SOC_COEX_HW_PTI;CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE;CONFIG_SOC_SDMMC_USE_GPIO_MATRIX;CONFIG_SOC_SDMMC_NUM_SLOTS;CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK;CONFIG_SOC_SDMMC_DELAY_PHASE_NUM;CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC;CONFIG_SOC_WIFI_HW_TSF;CONFIG_SOC_WIFI_FTM_SUPPORT;CONFIG_SOC_WIFI_GCMP_SUPPORT;CONFIG_SOC_WIFI_WAPI_SUPPORT;CONFIG_SOC_WIFI_CSI_SUPPORT;CONFIG_SOC_WIFI_MESH_SUPPORT;CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW;CONFIG_SOC_WIFI_PHY_NEEDS_USB_WORKAROUND;CONFIG_SOC_BLE_SUPPORTED;CONFIG_SOC_BLE_MESH_SUPPORTED;CONFIG_SOC_BLE_50_SUPPORTED;CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED;CONFIG_SOC_BLUFI_SUPPORTED;CONFIG_SOC_ULP_HAS_ADC;CONFIG_SOC_PHY_COMBO_MODULE;CONFIG_SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV;CONFIG_SOC_LCDCAM_CAM_PERIPH_NUM;CONFIG_SOC_LCDCAM_CAM_DATA_WIDTH_MAX;CONFIG_IDF_CMAKE;CONFIG_IDF_TOOLCHAIN;CONFIG_IDF_TOOLCHAIN_GCC;CONFIG_IDF_TARGET_ARCH_XTENSA;CONFIG_IDF_TARGET_ARCH;CONFIG_IDF_TARGET;CONFIG_IDF_INIT_VERSION;CONFIG_IDF_TARGET_ESP32S3;CONFIG_IDF_FIRMWARE_CHIP_ID;CONFIG_APP_BUILD_TYPE_APP_2NDBOOT;CONFIG_APP_BUILD_TYPE_RAM;CONFIG_APP_BUILD_TYPE_ELF_RAM;CONFIG_APP_BUILD_GENERATE_BINARIES;CONFIG_APP_BUILD_BOOTLOADER;CONFIG_APP_BUILD_USE_FLASH_SECTIONS;CONFIG_APP_REPRODUCIBLE_BUILD;CONFIG_APP_NO_BLOBS;CONFIG_NO_BLOBS;CONFIG_BOOTLOADER_COMPILE_TIME_DATE;CONFIG_BOOTLOADER_PROJECT_VER;CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE;CONFIG_APP_ROLLBACK_ENABLE;CONFIG_BOOTLOADER_OFFSET_IN_FLASH;CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE;CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG;CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF;CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE;CONFIG_BOOTLOADER_LOG_VERSION_1;CONFIG_BOOTLOADER_LOG_VERSION;CONFIG_BOOTLOADER_LOG_LEVEL_NONE;CONFIG_LOG_BOOTLOADER_LEVEL_NONE;CONFIG_BOOTLOADER_LOG_LEVEL_ERROR;CONFIG_LOG_BOOTLOADER_LEVEL_ERROR;CONFIG_BOOTLOADER_LOG_LEVEL_WARN;CONFIG_LOG_BOOTLOADER_LEVEL_WARN;CONFIG_BOOTLOADER_LOG_LEVEL_INFO;CONFIG_LOG_BOOTLOADER_LEVEL_INFO;CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG;CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG;CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE;CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE;CONFIG_BOOTLOADER_LOG_LEVEL;CONFIG_LOG_BOOTLOADER_LEVEL;CONFIG_BOOTLOADER_LOG_COLORS;CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS;CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN;CONFIG_BOOTLOADER_LOG_MODE_TEXT;CONFIG_BOOTLOADER_FLASH_DC_AWARE;CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT;CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V;CONFIG_BOOTLOADER_FACTORY_RESET;CONFIG_BOOTLOADER_APP_TEST;CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE;CONFIG_BOOTLOADER_WDT_ENABLE;CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE;CONFIG_BOOTLOADER_WDT_TIME_MS;CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP;CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON;CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS;CONFIG_BOOTLOADER_RESERVE_RTC_SIZE;CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC;CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED;CONFIG_SECURE_BOOT_V2_PREFERRED;CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT;CONFIG_SECURE_BOOT;CONFIG_SECURE_FLASH_ENC_ENABLED;CONFIG_FLASH_ENCRYPTION_ENABLED;CONFIG_SECURE_ROM_DL_MODE_ENABLED;CONFIG_APP_COMPILE_TIME_DATE;CONFIG_APP_EXCLUDE_PROJECT_VER_VAR;CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR;CONFIG_APP_PROJECT_VER_FROM_CONFIG;CONFIG_APP_RETRIEVE_LEN_ELF_SHA;CONFIG_ESP_ROM_HAS_CRC_LE;CONFIG_ESP_ROM_HAS_CRC_BE;CONFIG_ESP_ROM_HAS_MZ_CRC32;CONFIG_ESP_ROM_HAS_JPEG_DECODE;CONFIG_ESP_ROM_UART_CLK_IS_XTAL;CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING;CONFIG_ESP_ROM_USB_OTG_NUM;CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM;CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG;CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV;CONFIG_ESP_ROM_GET_CLK_FREQ;CONFIG_ESP_ROM_HAS_HAL_WDT;CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND;CONFIG_ESP_ROM_HAS_LAYOUT_TABLE;CONFIG_ESP_ROM_HAS_SPI_FLASH;CONFIG_ESP_ROM_HAS_SPI_FLASH_MMAP;CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG;CONFIG_ESP_ROM_HAS_NEWLIB;CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT;CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME;CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE;CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT;CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG;CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG;CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG;CONFIG_ESP_ROM_HAS_SW_FLOAT;CONFIG_ESP_ROM_HAS_VERSION;CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB;CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC;CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY;CONFIG_BOOT_ROM_LOG_ALWAYS_ON;CONFIG_BOOT_ROM_LOG_ALWAYS_OFF;CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH;CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW;CONFIG_ESPTOOLPY_NO_STUB;CONFIG_ESPTOOLPY_OCT_FLASH;CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT;CONFIG_ESPTOOLPY_FLASHMODE_QIO;CONFIG_FLASHMODE_QIO;CONFIG_ESPTOOLPY_FLASHMODE_QOUT;CONFIG_FLASHMODE_QOUT;CONFIG_ESPTOOLPY_FLASHMODE_DIO;CONFIG_FLASHMODE_DIO;CONFIG_ESPTOOLPY_FLASHMODE_DOUT;CONFIG_FLASHMODE_DOUT;CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR;CONFIG_ESPTOOLPY_FLASHMODE;CONFIG_ESPTOOLPY_FLASHFREQ_120M;CONFIG_ESPTOOLPY_FLASHFREQ_80M;CONFIG_ESPTOOLPY_FLASHFREQ_40M;CONFIG_ESPTOOLPY_FLASHFREQ_20M;CONFIG_ESPTOOLPY_FLASHFREQ;CONFIG_ESPTOOLPY_FLASHSIZE_1MB;CONFIG_ESPTOOLPY_FLASHSIZE_2MB;CONFIG_ESPTOOLPY_FLASHSIZE_4MB;CONFIG_ESPTOOLPY_FLASHSIZE_8MB;CONFIG_ESPTOOLPY_FLASHSIZE_16MB;CONFIG_ESPTOOLPY_FLASHSIZE_32MB;CONFIG_ESPTOOLPY_FLASHSIZE_64MB;CONFIG_ESPTOOLPY_FLASHSIZE_128MB;CONFIG_ESPTOOLPY_FLASHSIZE;CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE;CONFIG_ESPTOOLPY_BEFORE_RESET;CONFIG_ESPTOOLPY_BEFORE_NORESET;CONFIG_ESPTOOLPY_BEFORE;CONFIG_ESPTOOLPY_AFTER_RESET;CONFIG_ESPTOOLPY_AFTER_NORESET;CONFIG_ESPTOOLPY_AFTER;CONFIG_ESPTOOLPY_MONITOR_BAUD;CONFIG_MONITOR_BAUD;CONFIG_PARTITION_TABLE_SINGLE_APP;CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE;CONFIG_PARTITION_TABLE_TWO_OTA;CONFIG_PARTITION_TABLE_TWO_OTA_LARGE;CONFIG_PARTITION_TABLE_CUSTOM;CONFIG_PARTITION_TABLE_CUSTOM_FILENAME;CONFIG_PARTITION_TABLE_FILENAME;CONFIG_PARTITION_TABLE_OFFSET;CONFIG_PARTITION_TABLE_MD5;CONFIG_COMPILER_OPTIMIZATION_DEBUG;CONFIG_OPTIMIZATION_LEVEL_DEBUG;CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG;CONFIG_COMPILER_OPTIMIZATION_DEFAULT;CONFIG_COMPILER_OPTIMIZATION_SIZE;CONFIG_OPTIMIZATION_LEVEL_RELEASE;CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE;CONFIG_COMPILER_OPTIMIZATION_PERF;CONFIG_COMPILER_OPTIMIZATION_NONE;CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE;CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED;CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT;CONFIG_OPTIMIZATION_ASSERTIONS_SILENT;CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE;CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED;CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE;CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB;CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL;CONFIG_OPTIMIZATION_ASSERTION_LEVEL;CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT;CONFIG_COMPILER_HIDE_PATHS_MACROS;CONFIG_COMPILER_CXX_EXCEPTIONS;CONFIG_CXX_EXCEPTIONS;CONFIG_COMPILER_CXX_RTTI;CONFIG_COMPILER_STACK_CHECK_MODE_NONE;CONFIG_STACK_CHECK_NONE;CONFIG_COMPILER_STACK_CHECK_MODE_NORM;CONFIG_STACK_CHECK_NORM;CONFIG_COMPILER_STACK_CHECK_MODE_STRONG;CONFIG_STACK_CHECK_STRONG;CONFIG_COMPILER_STACK_CHECK_MODE_ALL;CONFIG_STACK_CHECK_ALL;CONFIG_COMPILER_NO_MERGE_CONSTANTS;CONFIG_COMPILER_WARN_WRITE_STRINGS;CONFIG_WARN_WRITE_STRINGS;CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS;CONFIG_COMPILER_DISABLE_GCC12_WARNINGS;CONFIG_COMPILER_DISABLE_GCC13_WARNINGS;CONFIG_COMPILER_DISABLE_GCC14_WARNINGS;CONFIG_COMPILER_DUMP_RTL_FILES;CONFIG_COMPILER_RT_LIB_GCCLIB;CONFIG_COMPILER_RT_LIB_NAME;CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING;CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE;CONFIG_COMPILER_STATIC_ANALYZER;CONFIG_EFUSE_CUSTOM_TABLE;CONFIG_EFUSE_VIRTUAL;CONFIG_EFUSE_MAX_BLK_LEN;CONFIG_ESP_ERR_TO_NAME_LOOKUP;CONFIG_ESP32S3_REV_MIN_0;CONFIG_ESP32S3_REV_MIN_1;CONFIG_ESP32S3_REV_MIN_2;CONFIG_ESP32S3_REV_MIN_FULL;CONFIG_ESP_REV_MIN_FULL;CONFIG_ESP32S3_REV_MAX_FULL;CONFIG_ESP_REV_MAX_FULL;CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL;CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL;CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA;CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP;CONFIG_ESP_MAC_ADDR_UNIVERSE_BT;CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH;CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR;CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES;CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO;CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR;CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES;CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC;CONFIG_ESP_SLEEP_POWER_DOWN_FLASH;CONFIG_ESP_SYSTEM_PD_FLASH;CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND;CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU;CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND;CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND;CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY;CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY;CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY;CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION;CONFIG_ESP_SLEEP_DEBUG;CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS;CONFIG_RTC_CLK_SRC_INT_RC;CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC;CONFIG_RTC_CLK_SRC_EXT_CRYS;CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS;CONFIG_RTC_CLK_SRC_EXT_OSC;CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC;CONFIG_RTC_CLK_SRC_INT_8MD256;CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256;CONFIG_RTC_CLK_CAL_CYCLES;CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES;CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM;CONFIG_PERIPH_CTRL_FUNC_IN_IRAM;CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM;CONFIG_GDMA_CTRL_FUNC_IN_IRAM;CONFIG_GDMA_ISR_HANDLER_IN_IRAM;CONFIG_GDMA_OBJ_DRAM_SAFE;CONFIG_GDMA_ENABLE_DEBUG_LOG;CONFIG_GDMA_ISR_IRAM_SAFE;CONFIG_XTAL_FREQ_40;CONFIG_XTAL_FREQ;CONFIG_ESP_BROWNOUT_DET;CONFIG_BROWNOUT_DET;CONFIG_ESP32S3_BROWNOUT_DET;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7;CONFIG_BROWNOUT_DET_LVL_SEL_7;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6;CONFIG_BROWNOUT_DET_LVL_SEL_6;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5;CONFIG_BROWNOUT_DET_LVL_SEL_5;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4;CONFIG_BROWNOUT_DET_LVL_SEL_4;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_4;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3;CONFIG_BROWNOUT_DET_LVL_SEL_3;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_3;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2;CONFIG_BROWNOUT_DET_LVL_SEL_2;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_2;CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1;CONFIG_BROWNOUT_DET_LVL_SEL_1;CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_1;CONFIG_ESP_BROWNOUT_DET_LVL;CONFIG_BROWNOUT_DET_LVL;CONFIG_ESP32S3_BROWNOUT_DET_LVL;CONFIG_ESP_BROWNOUT_USE_INTR;CONFIG_ESP_SYSTEM_BROWNOUT_INTR;CONFIG_ESP_INTR_IN_IRAM;CONFIG_ESP_ROM_PRINT_IN_IRAM;CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80;CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80;CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160;CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160;CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240;CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240;CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ;CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ;CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB;CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB;CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE;CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS;CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS;CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS;CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B;CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B;CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE;CONFIG_ESP32S3_DATA_CACHE_16KB;CONFIG_ESP32S3_DATA_CACHE_32KB;CONFIG_ESP32S3_DATA_CACHE_64KB;CONFIG_ESP32S3_DATA_CACHE_SIZE;CONFIG_ESP32S3_DATA_CACHE_4WAYS;CONFIG_ESP32S3_DATA_CACHE_8WAYS;CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS;CONFIG_ESP32S3_DATA_CACHE_LINE_16B;CONFIG_ESP32S3_DATA_CACHE_LINE_32B;CONFIG_ESP32S3_DATA_CACHE_LINE_64B;CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE;CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM;CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE;CONFIG_ESP32S3_TRAX;CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM;CONFIG_ESP_SYSTEM_IN_IRAM;CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT;CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT;CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT;CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS;CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK;CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP;CONFIG_ESP_SYSTEM_MEMPROT_FEATURE;CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK;CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE;CONFIG_SYSTEM_EVENT_QUEUE_SIZE;CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE;CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE;CONFIG_ESP_MAIN_TASK_STACK_SIZE;CONFIG_MAIN_TASK_STACK_SIZE;CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0;CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1;CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY;CONFIG_ESP_MAIN_TASK_AFFINITY;CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE;CONFIG_ESP_CONSOLE_UART_DEFAULT;CONFIG_CONSOLE_UART_DEFAULT;CONFIG_ESP_CONSOLE_USB_CDC;CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG;CONFIG_ESP_CONSOLE_UART_CUSTOM;CONFIG_CONSOLE_UART_CUSTOM;CONFIG_ESP_CONSOLE_NONE;CONFIG_CONSOLE_UART_NONE;CONFIG_ESP_CONSOLE_UART_NONE;CONFIG_ESP_CONSOLE_SECONDARY_NONE;CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG;CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED;CONFIG_ESP_CONSOLE_UART;CONFIG_CONSOLE_UART;CONFIG_ESP_CONSOLE_UART_NUM;CONFIG_CONSOLE_UART_NUM;CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM;CONFIG_ESP_CONSOLE_UART_BAUDRATE;CONFIG_CONSOLE_UART_BAUDRATE;CONFIG_ESP_INT_WDT;CONFIG_INT_WDT;CONFIG_ESP_INT_WDT_TIMEOUT_MS;CONFIG_INT_WDT_TIMEOUT_MS;CONFIG_ESP_INT_WDT_CHECK_CPU1;CONFIG_INT_WDT_CHECK_CPU1;CONFIG_ESP_TASK_WDT_EN;CONFIG_ESP_TASK_WDT_INIT;CONFIG_TASK_WDT;CONFIG_ESP_TASK_WDT;CONFIG_ESP_TASK_WDT_PANIC;CONFIG_TASK_WDT_PANIC;CONFIG_ESP_TASK_WDT_TIMEOUT_S;CONFIG_TASK_WDT_TIMEOUT_S;CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0;CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0;CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1;CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1;CONFIG_ESP_PANIC_HANDLER_IRAM;CONFIG_ESP_DEBUG_STUBS_ENABLE;CONFIG_ESP32_DEBUG_STUBS_ENABLE;CONFIG_ESP_DEBUG_OCDAWARE;CONFIG_ESP32S3_DEBUG_OCDAWARE;CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4;CONFIG_ESP_SYSTEM_BBPLL_RECALIB;CONFIG_ESP_IPC_ENABLE;CONFIG_ESP_IPC_TASK_STACK_SIZE;CONFIG_IPC_TASK_STACK_SIZE;CONFIG_ESP_IPC_USES_CALLERS_PRIORITY;CONFIG_ESP_IPC_ISR_ENABLE;CONFIG_FREERTOS_SMP;CONFIG_FREERTOS_UNICORE;CONFIG_FREERTOS_HZ;CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE;CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL;CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY;CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS;CONFIG_FREERTOS_IDLE_TASK_STACKSIZE;CONFIG_FREERTOS_USE_IDLE_HOOK;CONFIG_FREERTOS_USE_TICK_HOOK;CONFIG_FREERTOS_MAX_TASK_NAME_LEN;CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY;CONFIG_FREERTOS_USE_TIMERS;CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME;CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0;CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1;CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY;CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY;CONFIG_FREERTOS_TIMER_TASK_PRIORITY;CONFIG_TIMER_TASK_PRIORITY;CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH;CONFIG_TIMER_TASK_STACK_DEPTH;CONFIG_FREERTOS_TIMER_QUEUE_LENGTH;CONFIG_TIMER_QUEUE_LENGTH;CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE;CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES;CONFIG_FREERTOS_USE_TRACE_FACILITY;CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES;CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS;CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG;CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER;CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK;CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS;CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK;CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP;CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK;CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER;CONFIG_FREERTOS_ISR_STACKSIZE;CONFIG_FREERTOS_INTERRUPT_BACKTRACE;CONFIG_FREERTOS_FPU_IN_ISR;CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER;CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1;CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3;CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER;CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH;CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE;CONFIG_FREERTOS_PORT;CONFIG_FREERTOS_NO_AFFINITY;CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION;CONFIG_FREERTOS_DEBUG_OCDAWARE;CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT;CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH;CONFIG_FREERTOS_NUMBER_OF_CORES;CONFIG_FREERTOS_IN_IRAM;CONFIG_HAL_ASSERTION_EQUALS_SYSTEM;CONFIG_HAL_ASSERTION_DISABLE;CONFIG_HAL_ASSERTION_SILENT;CONFIG_HAL_ASSERTION_SILIENT;CONFIG_HAL_ASSERTION_ENABLE;CONFIG_HAL_DEFAULT_ASSERTION_LEVEL;CONFIG_HAL_WDT_USE_ROM_IMPL;CONFIG_LOG_VERSION_1;CONFIG_LOG_VERSION_2;CONFIG_LOG_VERSION;CONFIG_LOG_DEFAULT_LEVEL_NONE;CONFIG_LOG_DEFAULT_LEVEL_ERROR;CONFIG_LOG_DEFAULT_LEVEL_WARN;CONFIG_LOG_DEFAULT_LEVEL_INFO;CONFIG_LOG_DEFAULT_LEVEL_DEBUG;CONFIG_LOG_DEFAULT_LEVEL_VERBOSE;CONFIG_LOG_DEFAULT_LEVEL;CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT;CONFIG_LOG_MAXIMUM_LEVEL_DEBUG;CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE;CONFIG_LOG_MAXIMUM_LEVEL;CONFIG_LOG_MASTER_LEVEL;CONFIG_LOG_DYNAMIC_LEVEL_CONTROL;CONFIG_LOG_TAG_LEVEL_IMPL_NONE;CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST;CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST;CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY;CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP;CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE;CONFIG_LOG_COLORS;CONFIG_LOG_TIMESTAMP_SOURCE_RTOS;CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM;CONFIG_LOG_MODE_TEXT_EN;CONFIG_LOG_MODE_TEXT;CONFIG_LOG_IN_IRAM;CONFIG_LIBC_NEWLIB;CONFIG_LIBC_MISC_IN_IRAM;CONFIG_LIBC_LOCKS_PLACE_IN_IRAM;CONFIG_LIBC_NEWLIB_NANO_FORMAT;CONFIG_NEWLIB_NANO_FORMAT;CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT;CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT;CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER;CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1;CONFIG_LIBC_TIME_SYSCALL_USE_RTC;CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC;CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC;CONFIG_LIBC_TIME_SYSCALL_USE_HRT;CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT;CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER;CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1;CONFIG_LIBC_TIME_SYSCALL_USE_NONE;CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE;CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE;CONFIG_MMU_PAGE_SIZE_64KB;CONFIG_MMU_PAGE_MODE;CONFIG_MMU_PAGE_SIZE;CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC;CONFIG_SPI_FLASH_BROWNOUT_RESET;CONFIG_SPI_FLASH_HPM_ENA;CONFIG_SPI_FLASH_HPM_AUTO;CONFIG_SPI_FLASH_HPM_DIS;CONFIG_SPI_FLASH_HPM_ON;CONFIG_SPI_FLASH_HPM_DC_AUTO;CONFIG_SPI_FLASH_HPM_DC_DISABLE;CONFIG_SPI_FLASH_AUTO_SUSPEND;CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US;CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND;CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND;CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM;CONFIG_SPI_FLASH_VERIFY_WRITE;CONFIG_SPI_FLASH_ENABLE_COUNTERS;CONFIG_SPI_FLASH_ROM_DRIVER_PATCH;CONFIG_SPI_FLASH_ROM_IMPL;CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS;CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS;CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS;CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS;CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED;CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED;CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE;CONFIG_SPI_FLASH_YIELD_DURING_ERASE;CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS;CONFIG_SPI_FLASH_ERASE_YIELD_TICKS;CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE;CONFIG_SPI_FLASH_SIZE_OVERRIDE;CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED;CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST;CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_GD_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORT_ENABLED;CONFIG_SPI_FLASH_VENDOR_TH_SUPPORT_ENABLED;CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP;CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP;CONFIG_SPI_FLASH_SUPPORT_GD_CHIP;CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP;CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP;CONFIG_SPI_FLASH_SUPPORT_TH_CHIP;CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP;CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE;CONFIG_IDF_EXPERIMENTAL_FEATURES)
  827. # List of deprecated options for backward compatibility
  828. set(CONFIG_APP_BUILD_TYPE_ELF_RAM "")
  829. set(CONFIG_NO_BLOBS "")
  830. set(CONFIG_APP_ROLLBACK_ENABLE "")
  831. set(CONFIG_LOG_BOOTLOADER_LEVEL_NONE "")
  832. set(CONFIG_LOG_BOOTLOADER_LEVEL_ERROR "")
  833. set(CONFIG_LOG_BOOTLOADER_LEVEL_WARN "")
  834. set(CONFIG_LOG_BOOTLOADER_LEVEL_INFO "y")
  835. set(CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG "")
  836. set(CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE "")
  837. set(CONFIG_LOG_BOOTLOADER_LEVEL "3")
  838. set(CONFIG_FLASH_ENCRYPTION_ENABLED "")
  839. set(CONFIG_FLASHMODE_QIO "")
  840. set(CONFIG_FLASHMODE_QOUT "")
  841. set(CONFIG_FLASHMODE_DIO "y")
  842. set(CONFIG_FLASHMODE_DOUT "")
  843. set(CONFIG_MONITOR_BAUD "115200")
  844. set(CONFIG_OPTIMIZATION_LEVEL_DEBUG "y")
  845. set(CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG "y")
  846. set(CONFIG_COMPILER_OPTIMIZATION_DEFAULT "y")
  847. set(CONFIG_OPTIMIZATION_LEVEL_RELEASE "")
  848. set(CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE "")
  849. set(CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED "y")
  850. set(CONFIG_OPTIMIZATION_ASSERTIONS_SILENT "")
  851. set(CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED "")
  852. set(CONFIG_OPTIMIZATION_ASSERTION_LEVEL "2")
  853. set(CONFIG_CXX_EXCEPTIONS "")
  854. set(CONFIG_STACK_CHECK_NONE "y")
  855. set(CONFIG_STACK_CHECK_NORM "")
  856. set(CONFIG_STACK_CHECK_STRONG "")
  857. set(CONFIG_STACK_CHECK_ALL "")
  858. set(CONFIG_WARN_WRITE_STRINGS "")
  859. set(CONFIG_ESP_SYSTEM_PD_FLASH "")
  860. set(CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY "2000")
  861. set(CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY "2000")
  862. set(CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC "y")
  863. set(CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS "")
  864. set(CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC "")
  865. set(CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 "")
  866. set(CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES "1024")
  867. set(CONFIG_PERIPH_CTRL_FUNC_IN_IRAM "y")
  868. set(CONFIG_BROWNOUT_DET "y")
  869. set(CONFIG_ESP32S3_BROWNOUT_DET "y")
  870. set(CONFIG_BROWNOUT_DET_LVL_SEL_7 "y")
  871. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7 "y")
  872. set(CONFIG_BROWNOUT_DET_LVL_SEL_6 "")
  873. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6 "")
  874. set(CONFIG_BROWNOUT_DET_LVL_SEL_5 "")
  875. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5 "")
  876. set(CONFIG_BROWNOUT_DET_LVL_SEL_4 "")
  877. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_4 "")
  878. set(CONFIG_BROWNOUT_DET_LVL_SEL_3 "")
  879. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_3 "")
  880. set(CONFIG_BROWNOUT_DET_LVL_SEL_2 "")
  881. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_2 "")
  882. set(CONFIG_BROWNOUT_DET_LVL_SEL_1 "")
  883. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_1 "")
  884. set(CONFIG_BROWNOUT_DET_LVL "7")
  885. set(CONFIG_ESP32S3_BROWNOUT_DET_LVL "7")
  886. set(CONFIG_ESP_SYSTEM_BROWNOUT_INTR "y")
  887. set(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 "")
  888. set(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 "y")
  889. set(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240 "")
  890. set(CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ "160")
  891. set(CONFIG_SYSTEM_EVENT_QUEUE_SIZE "32")
  892. set(CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE "2304")
  893. set(CONFIG_MAIN_TASK_STACK_SIZE "3584")
  894. set(CONFIG_CONSOLE_UART_DEFAULT "y")
  895. set(CONFIG_CONSOLE_UART_CUSTOM "")
  896. set(CONFIG_CONSOLE_UART_NONE "")
  897. set(CONFIG_ESP_CONSOLE_UART_NONE "")
  898. set(CONFIG_CONSOLE_UART "y")
  899. set(CONFIG_CONSOLE_UART_NUM "0")
  900. set(CONFIG_CONSOLE_UART_BAUDRATE "115200")
  901. set(CONFIG_INT_WDT "y")
  902. set(CONFIG_INT_WDT_TIMEOUT_MS "300")
  903. set(CONFIG_INT_WDT_CHECK_CPU1 "y")
  904. set(CONFIG_TASK_WDT "y")
  905. set(CONFIG_ESP_TASK_WDT "y")
  906. set(CONFIG_TASK_WDT_PANIC "")
  907. set(CONFIG_TASK_WDT_TIMEOUT_S "5")
  908. set(CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 "y")
  909. set(CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 "y")
  910. set(CONFIG_ESP32_DEBUG_STUBS_ENABLE "")
  911. set(CONFIG_ESP32S3_DEBUG_OCDAWARE "y")
  912. set(CONFIG_IPC_TASK_STACK_SIZE "1280")
  913. set(CONFIG_TIMER_TASK_PRIORITY "1")
  914. set(CONFIG_TIMER_TASK_STACK_DEPTH "2048")
  915. set(CONFIG_TIMER_QUEUE_LENGTH "10")
  916. set(CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK "")
  917. set(CONFIG_HAL_ASSERTION_SILIENT "")
  918. set(CONFIG_NEWLIB_NANO_FORMAT "")
  919. set(CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT "y")
  920. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER "y")
  921. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 "y")
  922. set(CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC "")
  923. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC "")
  924. set(CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT "")
  925. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER "")
  926. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 "")
  927. set(CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE "")
  928. set(CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE "")
  929. set(CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS "y")
  930. set(CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS "")
  931. set(CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED "")