Retarget to Waveshare ESP32-P4-ETH; confirm pinout

The initial investigation board is the Waveshare ESP32-P4-ETH. Confirmed
its pin map against the published pinout / ESPHome device profile and
resolved the previously-inconsistent I2S rows:

- I2S now uses the onboard ES8311 pins: BCLK 12, LRCLK 10, DOUT 9
  (MCLK 13 and DIN 11 were already correct). Removes the placeholder
  external-DAC pins (36/33/32).
- Ethernet (IP101 GRI, addr 1) MDC/MDIO/REF_CLK/RST 31/52/50/51 and
  I2C 8/7 were already correct for this board.
- Flash bumped to 32MB (board has 32MB NOR + 32MB PSRAM).
- README pin table, hardware section, and roadmap updated (pinout item
  checked off); CLAUDE.md target-hardware section updated.

Still not build-verified (no ESP-IDF toolchain in this environment).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

CLAUDE.md

@@ -53,12 +53,13 @@ idf.py build
 idf.py flash monitor
 ```
 
-## Target hardware (confirm before relying on this)
+## Target hardware
 
-Reference pinout is DatanoiseTV's ESP32-P4-NANO board config — Ethernet via
-IP101 GRI PHY (RMII), I2S out via APLL-clocked codec (ES8311 onboard), full
-pin table in README.md. If the actual target board differs, update
-`main/main.c` pin config and the README table together.
+Target board is the **Waveshare ESP32-P4-ETH** — Ethernet via IP101 GRI PHY
+(RMII), onboard ES8311 codec (APLL-clocked I2S) + amplifier + mic + speaker
+connector, 32MB PSRAM, 32MB flash. Pins are confirmed and live in
+`main/board_config.h`, with the full table in README.md. If the board ever
+changes, update `main/board_config.h` and the README table together.
 
 ## Known hard problems
 

README.md

@@ -52,35 +52,30 @@ component.
 
 ## Hardware target
 
-Starting point is DatanoiseTV's reference pinout for the **ESP32-P4-NANO**
-board — confirm/update against whatever board this actually gets deployed on:
+Target board: **Waveshare ESP32-P4-ETH**
+([product](https://www.waveshare.com/esp32-p4-eth.htm) ·
+[wiki](https://www.waveshare.com/wiki/ESP32-P4-ETH)). Ethernet via IP101 GRI
+PHY (RMII); onboard ES8311 codec + amplifier + microphone + 8Ω speaker
+connector; 32 MB PSRAM, 32 MB NOR flash. Pins below are confirmed against the
+board's published pinout / ESPHome device profile and are mirrored in
+`main/board_config.h`.
 
 | Function | GPIO | Notes |
 |---|---|---|
-| Ethernet MDC | 31 | |
+| Ethernet MDC | 31 | IP101 GRI, PHY addr 1 |
 | Ethernet MDIO | 52 | |
-| Ethernet REF_CLK | 50 | External 50MHz crystal |
+| Ethernet REF_CLK | 50 | 50 MHz reference |
 | Ethernet PHY_RST | 51 | |
-| I2S MCLK | 13 | 18.432MHz via APLL |
-| I2S BCLK | 36 | (onboard: 12) |
-| I2S LRCLK | 33 | (onboard: 10) |
-| I2S DOUT | 32 | (onboard: 9) |
-| I2S DIN | 11 | Codec ADC input |
-| PA Enable | 53 | Active high |
-| I2C SCL / SDA | 8 / 7 | ES8311 control |
-
-Ethernet PHY: IP101 GRI via RMII. Onboard codec: ES8311 + NS4150B amp.
-
-> **Unresolved — confirm against the actual board.** The I2S rows above are
-> not internally consistent. BCLK/LRCLK/DOUT (36/33/32) are the *external
-> DAC* pins from the upstream example, while DIN (11) is the *onboard ES8311*
-> ADC pin — the upstream example's active config actually uses DIN=21 for an
-> external ADC. Decide whether this build targets the **onboard ES8311**
-> (MCLK 13, BCLK 12, LRCLK 10, DOUT 9, DIN 11) or an **external DAC/ADC**
-> (MCLK 13, BCLK 36, LRCLK 33, DOUT 32, DIN 21), then make the table,
-> `main/board_config.h`, and the ES8311 vs. external assumption in
-> `main/main.c` all agree. Current `board_config.h` mirrors the table above
-> verbatim (external data pins + onboard DIN) and is therefore a placeholder.
+| I2S MCLK | 13 | 18.432 MHz via APLL |
+| I2S BCLK | 12 | bit clock |
+| I2S LRCLK | 10 | word/frame clock |
+| I2S DOUT | 9 | data out → ES8311 DAC |
+| I2S DIN | 11 | data in ← ES8311 ADC / mic |
+| PA Enable | 53 | active high (speaker amp) |
+| I2C SCL / SDA | 8 / 7 | ES8311 control (addr 0x18) |
+
+Fixed EMAC RMII data pins (not software-configurable, listed for reference):
+TXD0/1 = 34/35, RXD0/1 = 30/29, TX_EN = 49, CRS_DV = 28.
 
 ## Repo layout
 
@@ -103,15 +98,14 @@ idf.py flash monitor
 ```
 
 `components/aes67` is vendored in (from `aes67-esp32p4`, Apache-2.0) and
-`main/` wires it up via `main/board_config.h`. Not yet build-verified in this
-environment — needs an ESP-IDF v5.5+ toolchain and, before flashing, the
-pinout confirmation noted above.
+`main/` wires it up via `main/board_config.h` (pins confirmed for the
+Waveshare ESP32-P4-ETH). Not yet build-verified — needs an ESP-IDF v5.5+
+toolchain.
 
 ## Roadmap
 
 - [x] Fork `aes67-esp32p4`'s `components/aes67` in as the starting point
-- [ ] Confirm pinout against actual target hardware (see note above — I2S rows
-      are inconsistent and `board_config.h` is a placeholder)
+- [x] Confirm pinout against actual target hardware (Waveshare ESP32-P4-ETH)
 - [ ] Build-verify with ESP-IDF v5.5+ (`idf.py set-target esp32p4 build`)
 - [ ] Get AES67 send/receive verified against real Dante gear in AES67 mode
 - [x] Write clean-room Dante protocol notes (`docs/dante-protocol-notes.md`)

main/board_config.h

@@ -1,14 +1,12 @@
 /*
  * board_config.h — hardware pin map for the ESP32-P4 Dante/AES67 endpoint.
  *
- * Reference target: DatanoiseTV ESP32-P4-NANO (Ethernet via IP101 GRI PHY on
- * RMII, onboard ES8311 codec + NS4150B amp). Values mirror the pin table in
- * README.md. If the deployed board differs, update BOTH this file and the
- * README table together (see CLAUDE.md).
- *
- * NOTE: some I2S functions have alternate "onboard" pin options noted in the
- * README. The active values below use the primary column; onboard variants
- * are listed in comments for quick swapping.
+ * Target board: Waveshare ESP32-P4-ETH (Ethernet via IP101 GRI PHY on RMII,
+ * onboard ES8311 codec + amplifier + mic + speaker connector, 32MB PSRAM,
+ * 32MB flash). Pins confirmed against the board's published pinout / ESPHome
+ * device profile. Values mirror the pin table in README.md — if the board
+ * ever changes, update BOTH this file and the README table together
+ * (see CLAUDE.md).
  */
 #pragma once
 
@@ -19,12 +17,12 @@
 #define BOARD_ETH_PHY_RST_GPIO  51
 #define BOARD_ETH_PHY_ADDR      1
 
-/* ---- I2S audio to ES8311 codec ---- */
+/* ---- I2S audio to onboard ES8311 codec ---- */
 #define BOARD_I2S_MCLK_GPIO     13  /* 18.432 MHz via APLL */
-#define BOARD_I2S_BCLK_GPIO     36  /* onboard alt: 12 */
-#define BOARD_I2S_LRCLK_GPIO    33  /* onboard alt: 10 */
-#define BOARD_I2S_DOUT_GPIO     32  /* onboard alt: 9  */
-#define BOARD_I2S_DIN_GPIO      11  /* codec ADC input */
+#define BOARD_I2S_BCLK_GPIO     12  /* bit clock */
+#define BOARD_I2S_LRCLK_GPIO    10  /* word/frame clock */
+#define BOARD_I2S_DOUT_GPIO      9  /* data out -> codec DAC */
+#define BOARD_I2S_DIN_GPIO      11  /* data in  <- codec ADC / mic */
 
 /* ---- Power amp enable (NS4150B) ---- */
 #define BOARD_PA_ENABLE_GPIO    53  /* active high */

sdkconfig.defaults

@@ -93,7 +93,7 @@ CONFIG_LWIP_IPV6=n
 CONFIG_HTTPD_WS_SUPPORT=y
 CONFIG_LWIP_MAX_SOCKETS=16
 
-# Flash
-CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
+# Flash (Waveshare ESP32-P4-ETH: 32MB NOR flash)
+CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y
 CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
 CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE=y