Dante-interoperable AES67 audio-over-IP firmware for the ESP32-P4
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3 months ago | |
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| components | 3 months ago | |
| docs | 3 months ago | |
| main | 3 months ago | |
| .gitignore | 3 months ago | |
| CLAUDE.md | 3 months ago | |
| CMakeLists.txt | 3 months ago | |
| LICENSE | 3 months ago | |
| README.md | 3 months ago | |
| sdkconfig.defaults | 3 months ago |
Status: AES67 base vendored in, untested on hardware. The aes67-esp32p4
engine and a board-configurable app entry point are in place; not yet
build-verified or run against real gear. Native Dante support is still at the
notes stage.
A low-cost, network audio endpoint on the ESP32-P4 that can interoperate with Dante-based AV systems. In practice "Dante-interoperable" is being pursued in two phases:
The original ESP32 (WiFi, Xtensa) can't hold AES67's ~1ms RTP packet timing tightly enough over WiFi to be spec-compliant. The P4 drops WiFi in favour of a real Ethernet MAC with hardware PTP timestamping, which is what makes sub-millisecond, spec-accurate AoIP achievable on this class of chip at all.
This is what we fork from. It already solves the hard, P4-specific problems: hardware PTP timestamping via the EMAC, an I2S driver with APLL clock recovery, an RTP engine with an L2 hook that bypasses lwIP for latency, SAP/SDP, and mDNS/DNS-SD advertisement. Apache-2.0 means we can build on it freely, including for commercial client work.
A full software Dante device implementation for Linux. We do not vendor or
copy code from this repo. It's copyleft-licensed, and incorporating its
code would obligate this whole firmware image to the same license — which
rules out using it in closed commercial deliverables. Instead it's used as
documentation: reading inferno_aoip to understand Dante's wire behaviour
(mDNS service records, control-protocol framing, flow subscriptions) well
enough to write an independent, clean-room implementation against the P4
component.
This licensing boundary is the most important constraint on this project. See
CLAUDE.mdfor the hard rule any dev session (human or agent) needs to follow.
Target board: Waveshare ESP32-P4-ETH
(product ·
wiki). Ethernet via IP101 GRI
PHY (RMII); onboard ES8311 codec + amplifier + microphone + 8Ω speaker
connector; 32 MB PSRAM, 32 MB NOR flash. Pins below are confirmed against the
board's published pinout / ESPHome device profile and are mirrored in
main/board_config.h.
| Function | GPIO | Notes |
|---|---|---|
| Ethernet MDC | 31 | IP101 GRI, PHY addr 1 |
| Ethernet MDIO | 52 | |
| Ethernet REF_CLK | 50 | 50 MHz reference |
| Ethernet PHY_RST | 51 | |
| I2S MCLK | 13 | 18.432 MHz via APLL |
| I2S BCLK | 12 | bit clock |
| I2S LRCLK | 10 | word/frame clock |
| I2S DOUT | 9 | data out → ES8311 DAC |
| I2S DIN | 11 | data in ← ES8311 ADC / mic |
| PA Enable | 53 | active high (speaker amp) |
| I2C SCL / SDA | 8 / 7 | ES8311 control (addr 0x18) |
Fixed EMAC RMII data pins (not software-configurable, listed for reference): TXD0/1 = 34/35, RXD0/1 = 30/29, TX_EN = 49, CRS_DV = 28.
components/aes67/ Forked from aes67-esp32p4 — AES67 engine (PTP, RTP, I2S, SAP/SDP, mDNS)
components/dante/ Clean-room Dante support (discovery now; ARC/CMC/flows/PTPv1 later)
main/ Application entry point, board config
docs/ Design notes, incl. clean-room Dante protocol notes
reference/ Local clones of both source repos, for reading only (gitignored, not part of this repo)
Requires ESP-IDF v5.5+ with the ESP32-P4 target.
idf.py set-target esp32p4
idf.py build
idf.py flash monitor
components/aes67 is vendored in (from aes67-esp32p4, Apache-2.0) and
main/ wires it up via main/board_config.h (pins confirmed for the
Waveshare ESP32-P4-ETH). Not yet build-verified — needs an ESP-IDF v5.5+
toolchain.
aes67-esp32p4's components/aes67 in as the starting pointidf.py set-target esp32p4 build)docs/dante-protocol-notes.md)components/dante, read-only browse)Apache-2.0 (see LICENSE), matching the aes67-esp32p4 base this project
forks from.